Commit Graph

265 Commits

Author SHA1 Message Date
Yin Fengwei
b22cc43f81 hv: move boot/multiboot.c to boot/sbl/multiboot.c
boot/multiboot.c is only used by SBL. So move it to boot/sbl.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-05-23 11:43:19 +08:00
David B. Kinder
04572a76a8 doc: add missing param documentation hypercall.h
Add missing documentation for hcall_get_cpu_pm_state vm parameter

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2018-05-23 11:11:26 +08:00
Jack Ren
d04bce2dd0 hv: don't use the EDK Shell API to get the cmdline
EDK Shell API is not standard API defined by UEFI spec.
The gnu-efi below v3.0 doesn't support EDK Shell API
(for example, GetShellArgcArgv), that leads to the hypervisor
unable to boot up when the host machine is installed with
old gnu-efi.

Signed-off-by: Jack Ren <jack.ren@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 11:10:47 +08:00
Jack Ren
6d3ceaef98 hv: pass the cmdline to hypervisor
That can allow the user to pass the cmdline to hypervisor
from UEFI Shell or BIOS. For example:

Shell> EFI\acrn\acrn.efi bootloader=\EFI\org.clearlinux\bootloaderx64.efi uart=mmio@0x91230000

$ sudo efibootmgr -c -l "\EFI\acrn\acrn.efi" -d /dev/sda -p 1 -L \
"ACRN Hypervisor" -u "bootloader=\EFI\org.clearlinux\bootloaderx64.efi uart=mmio@0x91230000"

Signed-off-by: Jack Ren <jack.ren@intel.com>
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-23 11:10:47 +08:00
Yonghua Huang
03ae242eb7 HV:initialize variables before reference in vmx.c
- to avoid complains from code static scan tool

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-22 17:16:07 +08:00
Mingqiang Chi
ccc1c25e88 hv:Use exception vector MACRO instead of hardcode
Now use hardcode when inject GP/NMI to guest,
replace it with MACRO.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-05-22 16:42:38 +08:00
Yonghua Huang
aee1931ee6 HV: refine 'decode_instruction() function
update:
   1. remove 'struct mem_io *'from input arguments
   2. return 'opsize' instead of status.
   3. rename 'vmm_decode_instruction()'

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-22 16:41:19 +08:00
Jason Chen CJ
fcd79325e1 doxygen: fix wrong description in hypercall.h
fix wrong description for hcall_get_cpu_pm_state/hcall_world_switch

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-22 16:39:24 +08:00
Jason Chen CJ
05f8fd701a hypercall: do not allow hypercall from UOS except trusty
only trusty related hypercall will come from UOS, others should come from VM0

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-22 11:38:04 +08:00
Jason Chen CJ
f505f338bd hypercall: only allow hypercall from RING-0
only allow hypercall from RING-0

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-22 11:38:04 +08:00
Kaige Fu
d2191401c8 HV: Trace: Remove macro GEN_CASE
Macro GEN_CASE in hypervisor is not used. It's just for userspcace tool
acrntrace and we get one copy of it in ./tools/acrntrace/trace_event.h.
So, remove it.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-22 11:11:09 +08:00
Jason Chen CJ
c09b9aa9c1 exception: only trap #MC
HV only print out message for #MC then inject it back to guest.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-22 11:10:15 +08:00
Binbin Wu
d8d6176266 hv: fix general protection injection
Exception type is missing when inject a #GP.
GP should be injected even when guest irq disabled.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-05-22 10:39:56 +08:00
Mingqiang Chi
2175bcafa1 hv: replace _EC with _ERROR_CODE in VMCS field
EC is not clear, replace it with ERROR_CODE.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-05-21 15:11:23 +08:00
Yin Fengwei
6ef48fa30e hv: Add reboot shell command
To trigger warm reboot for debugging.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-05-18 16:38:40 +08:00
Yonghua Huang
0e5f7cb91c hv: bugfix - MMIO access size was not properly initialized.
- MMIO access size is not initialized before
  instruction emulation.
- rename 'analyze_instruction()' to 'decode_instruction()'

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-18 16:37:44 +08:00
Victor Sun
99189b4e48 HV: cleanup for io request related functions
Changes:
  1. Move io request related functions from hypercall.c to io_request.c
     since they are not hypercalls;
  2. Remove acrn_insert_request_nowait() as it is never used;

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 16:36:33 +08:00
Qi Yadong
b55511abd6 HV: remove tinycrypt
Remove tinycrypt files:
Currently, hkdf_sha256 (based on Tinycrypt) is used by Trusty seed
derivation. And we plan to remove Tinycrypt from ACRN hypervisor
now, and replace it with another crypto lib in the future.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Reviewed-by: Zhu Bing <bing.zhu@intel.com>
Reviewed-by: Wang Kai <kai.z.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 14:02:57 +08:00
Yin Fengwei
03a3fb0d2a hv: cleanup the shell cmd code.
Remove cmd register API. And use static pre-defined cmd array
instead.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-05-18 10:53:34 +08:00
Li, Fei1
edb26a7e17 hv: refine the left atomic operation
rename atomic_cmpxchg_int to atomic_cmpxchg
replace atomic_cmpset_long with atomic_cmpxchg64
rename atomic_readandclear_long to atomic_readandclear64

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
1f3da93e74 hv: refine atomic_load/store_xxx name
rename atomic_load/store_xxx32 to atomic_load/store
rename atomic_load/store_xxx64 to atomic_load64/store64

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
336a8883db hv: remove atomic_add/subtract API
add atomic_inc(64)/dec(64) API.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
fadaf14a94 hv: refine atomic_xadd
1. rename atomic_xadd_int to atomic_xadd, add atomic_xadd64.
2. add atomic_add/sbu64_return, atomic_inc/dec64_return.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
bd3f3b00f7 hv: fix incorrect use of atomic_set_xxx
1. vpic_wire_mode no need to atomically set its value.
2. uart open conut want to atomically set its value not atomically set
its bits.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
0a83cf462d hv: remove support atomic operation for char/short
From now on, only plan to support atomic operation for int/long.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Li, Fei1
5e427f340e hv: lib: split atomic operation to atomic.h
split atomic related operation to file atomic.h

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:52:31 +08:00
Mingqiang Chi
b3126bdc11 hv: Check ept rwx misconfigurations
Check ept rwx misconfigurations when config memory attribute,
if misconfig it will assert.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-18 10:51:33 +08:00
Yonghua Huang
25219e29a5 HV: refine EPT violation VM-exit handler
- refine EPT violation vmexit handler
- add check for mmio access that spans devices

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-17 15:35:22 +08:00
Victor Sun
a6780652f3 HV: operate schedule lock on correct vcpu
Lock should be on target vcpu in function pause_vcpu(), not current vcpu.

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 15:34:59 +08:00
Jason Chen CJ
71e1ae17ce hypercall: add set_memmaps hypercall support
Add set_memmaps hypercall to support multi regions memmap.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 15:34:18 +08:00
Jason Chen CJ
ab0ba5f520 Doc: add UEFI boot chapter in primer
add UEFI boot chapter in primer.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-17 11:33:18 +08:00
Jason Chen CJ
8fbb21f7c6 bsp: make hugetlb config enabled by default for SBL platform
switch to hugetlb for SBL platform

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-05-17 11:33:18 +08:00
Jason Chen CJ
a6ff3a9bdc vm: allocated all pcpus to vm0 at the beginning
allocated all pcpus to vm0 to handle possible AP wakeup flow for all cpus,
as we pass org ACPI table to VM0 - that means VM0 can see all CPUs.

SOS(VM0) start expected CPUs through "maxcpus=" kernel cmdline option.

During first hypercall from SOS, calling vm_fixup to free un-expect-enabled
vcpus from VM0.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 10:23:27 +08:00
Jason Chen CJ
d2a7a9c91d uefi: remove warkaround for AP wakeup
remove sipi_from_efi_boot_service_exit & efi_deferred_wakeup_pcpu workaround
for uefi boot flow

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 10:23:27 +08:00
Jason Chen CJ
953f6b5b1b vlapic: kick AP for INIT-SIPI sequence
wakeup AP need INIT-SIPI-SIPI sequence in old time, now we only need
INIT-SIPI.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Xu, Anthony <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 10:23:27 +08:00
Qi Yadong
2ea3b49858 HV: refine copy_from_vm/copy_to_vm
If the target is an array, then only the first element
will be copied.
So replace structure assignment with memcpy_s().

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-17 10:21:38 +08:00
Edwin Zhai
e1bb372763 HV: increase UOS VIOAPIC pin count
To avoid UOS virtual GSI sharing

Signed-off-by: Edwin Zhai <edwin.zhai@intel.com>
2018-05-16 15:09:48 +08:00
Geoffroy Van Cutsem
3efef5790c Remove duplicate license file
Remove 'license_header' files that were located in hypervisor/ and
devicemodel/ and used by the respective Makefiles to build the
'include/version.h' header file.

Both Makefiles were adjusted to use the top-level LICENSE file

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2018-05-16 13:22:17 +08:00
Kaige Fu
93fda88893 lib: Move mem operations functions to one src file
Move all mem operations functions into a single
source code file, instead of the various source
code files that just implement a single or few
funtion.

No functional change.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-16 11:57:11 +08:00
Kaige Fu
497eadcb9a lib: Move all str ops functions to one src file
Move all string operations functions into a single
source code file, instead of the various source
code files that just implement a single or few
function.

No functional change.

Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-16 11:57:11 +08:00
Yonghua Huang
69d9918ddc remove potential using default i/o handler
- device driver should register valid i/o handlers
  in any cases, avoid referencing to default handler

- remove i/o handler test code as they shall
  never be NULL.

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 18:03:34 +08:00
Yonghua Huang
c597a0fc2f I/O VM-exit handler cleanup
- add check for spanning i/o devices access
- remove ASSERT in I/O instr. VM exit handler

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui
9efbf1212f HV: Enable the -O2 option for HV
Now the -O0 option is used. In such case the code is not optimized.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui
263fafe819 HV: Initialize one variable to fix the compiling warning
If the optimization option is enabled, it is possible that one variable is
not initialized before using in the get_vioapic_info. (In fact the warning is
bogus)
This is only to reduce the compiling warning.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui
3a9bf54d66 HV: Add gcc compiler option to disable FPU/SSE/MMX
FPU/SSE is not supported in HV. Otherwise it is possible that the
SSE/FPU register is used under -O2 option.
So the gcc option is added to disable them.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui
52a91fff0d HV: Use the CFLAGS to control the optimization option
Now two flags can be used to control the optimizatin option. So unify them
and only one flag can be used to config the optimization

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui
698b53adc4 HV: Add one correct Descriptor_table struct to configure VMCS
Now one uint64_t type is used to obtain the corresponding descriptor_table
for GDT/IDT. This will cause the stack protect corruption under -O2.
So the descriptor_table struct is added to configure the GDT/IDT of VMCS.

V1->V2: Move the descriptor_table into vmx.h header file
And its type is renamed from dt_addr_t to descriptor_table.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Zhao Yakui
b2cadfecdf HV: Fix the incorrect operand-constraints for inline assembly
The RFLAGS will be touched in some inline assembly.(exec_vmxon/
RFLAGS_RESTORE). The "cc" constraint should be added. Otherwise
it won't be handled under -O2 option.
And "%%XXX" register should also be added into constraints.
Otherwise it will be optimized incorrectly.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zheng Gen <gen.zheng@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Li, Fei1
9dd7d27737 hv: vlapic_timer: refine vlapic tscdeadline timer
Add vlapic_create_timer/vlapic_reset_timer to setup/reset a timer.
Add vlapic_update_lvtt to disarm timer when mode changes.

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00
Li, Fei1
ea54216116 hv: vlapic_timer: add vlapic timer mode API
Add vlapic_lvtt_oneshot, vlapic_lvtt_masked
rename vlapic_periodic_timer to vlapic_lvtt_period
rename VLAPIC_TSCDEADLINE to vlapic_lvtt_tsc_deadline

Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 18:03:33 +08:00