Commit Graph

856 Commits

Author SHA1 Message Date
Manisha Chinthapally
b3cb7a53d4 Fix to kernel hang in smp_call_function
smp_call_function:
 smp_call_mask can be modified by more than one process which can cause kernel hang and timeout

Adding a lock to smp_call_mask to prevent race condition

Tracked-On: #1606
Acked-by:   Xu, Anthony <anthony.xu.intel.com>
Signed-off-by: Manisha Chinthapally <manisha.chinthapally@intel.com>
2018-10-26 13:44:18 +08:00
Chinthapally, Manisha
5985c1216e HV:Added implementation for PMI handler function
irq.c/.h:
	Added new variables(ctx_rflags, ctx_rip, ctx_cs) in irq_desc
	On each interrupt this information is populated
	Added api's to access the irq_desc members

profiling.c:
	profiling_pmi_handler:On each PMI generates gets the context and other information that	caused it

Tracked-On: projectacrn#1409
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Chinthapally, Manisha <manisha.chinthapally@intel.com>
2018-10-26 13:39:07 +08:00
Chinthapally, Manisha
8ba333d275 HV: Added Initial support for SEP/SOCWATCH profiling
This patch adds support to sep/socwatch profiling
     Adds 2 new files include/arch/x86/profiling.h and arch/x86/profiling.c
     which contains most of the implementation for profiling,most of the functions
     in profiling.c have dummy implementation and will be implemented in next patches

     a. cpu.c, Initial profiling setup is done as part of bsp_boot_post
  and cpu_secondary_post flow
     b. vmcall.c, New ioctl is added for performing profiling related
  operations in vmcall_vmexit_handler
	ioctl - HC_PROFILING_OPS
        function - hcall_profiling_ops()
     c. common/hypercall.c, hcall_profiling_ops() implementation.
     d. hv_main.c, In vcpu_thread calling profiling related functions
  to save vm context
     e. acrn_hv_defs.h, list all the profiling command types

Tracked-On: projectacrn#1409
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Chinthapally, Manisha <manisha.chinthapally@intel.com>
2018-10-26 13:39:07 +08:00
Kaige Fu
05834927cc HV: Fix boot failure of partition mode
When drdh_info_array[0].ignore = false with partition mode enabled,the following
assert error will be triggered when trying to boot vm:

Assertion failed in file arch/x86/vtd.c: fatal error

The root cause is that root_table_addr reading from CPU3(vm2's bsp) is NULL.

This patch move the init_iommu which initialize root_table_addr before starting
secondary cores and flush the cache at the end if the function to avoid getting
NULL pointer from secondary cores.

Tracked-On: #1160
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Reviewed-by: Binin Wu <binbin.wu@intel.com>
2018-10-26 09:16:56 +08:00
Mingqiang Chi
1568a4c095 hv:Remove deadcode 'vm_lapic_from_pcpuid'
This api is not used, remove it.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2018-10-25 13:45:40 +08:00
Huihuang Shi
46d198244f HV:vcpu fix "Pointer param should be declared pointer to const"
Fix violations whose parameter can be read-only.
This patch only fix the parameter whose name is vcpu.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-25 13:45:14 +08:00
Huihuang Shi
ea32c34ae1 HV:fix "Pointer param should be declared pointer to const"
Fix violations for function whose parameter can be read-only.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-25 13:45:14 +08:00
Yin Fengwei
85bec0d0d1 hv: Move the guest_sw_loader() call from vcpu to vm
guest software loading is per VM instead of vcpu. So we move it
from prepare_vcpu to prepare_vm. And make sure it's called for
all VMs for partition mode.

Tracked-On: #1565
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-25 13:43:46 +08:00
Sainath Grandhi
09193c3913 hv: x2apic support for acrn
All the platforms supported by ACRN supports x2APIC. So enabled
x2APIC for ACRN hv. Removed any code that is needed for xAPIC mode
of operation.

Tracked-On: #1455
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed by:  Yonghua Huang <yonghua.huang@intel.com>
2018-10-25 13:41:29 +08:00
Li, Fei1
a43ff9ce98 hv: timer: add debug information for add_timer
If a timer added more than once, assert the debug information.

Tracked-On: #1546
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-10-23 11:40:38 +08:00
Li, Fei1
39fde060c3 hv: ept: remove EPT paging table for HPA to GPA
There's no need to walk these paging tables to transfer HPA to GPA
for a VM, so remove it.

Tracked-On: #1124
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-23 09:12:51 +08:00
Li, Fei1
70ddca3a87 hv: mmu: add pre-assumption for hpa2gpa
They're: (a) only SOS would use hpa2gpa and (b) the GPA and HPA
in SOS is identical mapping.
Rename hpa2gpa to vm0_hpa2gpa then.

Tracked-On: #1124
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-10-23 09:12:51 +08:00
Huihuang Shi
60b216a460 HV:fixed "Pointer param should be declared pointer to const"
Pointer param should be declared pointer to const if
the parameter is keeped read-only.
This patch changes pointer param whose name is vm.

Tracked-On:#861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-19 22:49:38 +08:00
Jason Chen CJ
1c7d2f653a vuart: change irq from 4 to 6
irq 4 is sharing with idma, after change vuart to level trigger, the idma
driver could handle this irq 4 and send out EOI, which cause the irq storm.

move vuart irq to a not used 6.

Tracked-On: https://github.com/projectacrn/acrn-hypervisor/issues/1476
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-10-19 18:06:31 +08:00
Jason Chen CJ
6485666a93 Revert "hv: x2apic support for acrn"
This reverts commit 348e2ba168.
2018-10-19 17:24:56 +08:00
Mingqiang Chi
85ececd2d7 hv:Simplify for-loop when walk through the vcpu
-- Not return NULL for vcpu_from_vid
  We have replaced dynamic memory with static memory for vcpu,
  then if vcpu_id is valid, this API should not return NULL.
-- Simplify the for-loop when walk through the vcpu

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-19 14:23:08 +08:00
Mingqiang Chi
fabe607247 hv:Replace dynamic memory with static for microcode
Reserve 256KB static memory for microcode

v1-->v2:
  -- add spinlock when update microcode

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-18 09:32:27 +08:00
Victor Sun
ca65e8c727 HV: refine APIC base address to platform acpi info
The base address of LAPIC and IOAPIC should be parsed from MADT table,
so move the definition to platform_acpi_info.h.

Tracked-On: #1500
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-18 09:26:59 +08:00
Victor Sun
8f701b0ff7 HV: move NR_IOAPICS to platform acpi info
The I/O APIC number should be parsed from host ACPI table, so move the
definition from Kconfig to platform_acpi_info.h.

Tracked-On: #1500
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-18 09:26:59 +08:00
Victor Sun
bf834072d4 HV: platform acpi info refactor
Replace platform_acpi_info.c with platform_acpi_info.h and define needed
host ACPI info in MACROs. Then the struct host_acpi_info is not needed
any more.

This header file should be generated by offline tool automatically;

Tracked-On: #1500
Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-18 09:26:59 +08:00
Huihuang Shi
4620b935de fix "use of single line comments(s) //"
Replace "//" with '/*','*/' couples.

V1->V2:
    Correct comment "Tracked-On" format

V2->V3:
    Remove "/* ==...===*/" comment

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-17 16:16:31 +08:00
Qi Yadong
a98dd9e3fe HV: trusty: set cse_svn when derive dvseed for trusty
Bugfix: need to set cse_svn when derive dvseed for trusty.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2018-10-17 14:30:52 +08:00
Yin Fengwei
eb328d78ea hv: retain rip if the fault is injected to guest
According to SDM 6.5 exception classification, if the fault
happens, the CPU will return to the faulting instruction. So
we shouldn't change rip to the next instruction if inject fault
to guest.

Tracked-On: #1473
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-17 10:05:36 +08:00
Sainath Grandhi
348e2ba168 hv: x2apic support for acrn
All the platforms supported by ACRN supports x2APIC. So enabled
x2APIC for ACRN hv. Removed any code that is needed for xAPIC mode
of operation.

Tracked-On: #1455
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
Reviewed by:  Yonghua Huang <yonghua.huang@intel.com>
2018-10-17 08:46:42 +08:00
Huihuang Shi
c6c1e42b79 HV:fix 'missing for discarded return value' violations
Return value should be checked,fix it by add
"void" when the function return value is not used.

V1->V2:
    replace printf with pr_warn.
V2->V3:
    change the commit to make read easily.

Tracked-On:#861

Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-16 13:31:02 +08:00
Wei Liu
96412ac147 hv: add suffix(U/UL) to come up MISRA-C into include
MISRA-C required the suffix(U/UL), such as:
(1) ---> (1U)
(1) ---> (1UL)
(1U << 0) ---> (1U << 0U)
This patch will add the suffix(U/UL) to come up MISRA-C into
hypervisor/include directory.

Tracked-On: #1468
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 22:33:30 +08:00
Minggui Cao
b4a7a1ea1a HV: allow no IRR when pending bit set if no APIC-V
An issue reported on KBL NUC (No APIC-V), when runing GVT test
case, it is easily to cause SOS/UOS hung. This patch is to root
cause it and how to avoid it.

On some platforms with no APIC-V support, this modidication can
avoid SOS hung when no IRR but event pending bit set.

If no APIC-V, interrupt injection will use IRR in vLAPIC and
event pending bitmap; work logic as following (set ABC for notes):
1. in ISR or when UOS send an interrupt to SOS/VHM (like IO request),
    step A: set IRR --> step B: set event pending bit;
2. in SOS event handing,  step C: check/clear event pending bit -->
  step D: probe/get IRR --> step E: clear/handle IRR.
3. after that, it will probe IRR again to check if other IRR left:
  step F: probe IRR --> step G: set event pending bit --> step H:
  enable IRQ window in VMX.

Before, from step C to D, if pending bit checked, but no IRR, it will
return -1, then the CPU will goto ZOMBIE status. It can cause
SOS hung. It can happen occasionally under following case :
4. between UOS step A and step B, SOS can goto step F, so it
gets IRR, and step G --> step H, then SOS enter non-root mode, for
IRQ window enabled, it will cause vmexit to continue step C/D/E.
5. then UOS does step B, to set pending bit, but no IRR now. When next
vmexit, SOS does step C and D, it can't get IRR, failure happens.

In summary, a failed case steps: A-->F-->G-->H-->C-->D-->E-->B-->C-->D

So we allow that when event pending bit checked, IRR could be cleared
already.It just wastes one probe time occasionally.

Tracked-On: #1363
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 22:19:14 +08:00
Yonghua Huang
38d5df723d hv:enable APICv-Posted Interrupt
to enable APICv Posted interrupt supported, following the
 specifications defined in Intel SDM Section #29.6, Volume3.

 Posted-interrupt processing is a feature by which a processor
 processes the virtual interrupts by recording them as pending
 on the virtual-APIC page.

 Injecting interrupts to VCPU from remote CPU without causing
 VM exit on the destination, following steps in SDM Section 29.6,volume3:

Tracked-On: #1447
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 22:18:24 +08:00
Mingqiang Chi
1d725c89c0 hv:Replace dynamic memory with static for vcpu
-- Replace dynamic memory allocation with static memory
-- Remove parameter check if vcpu is NULL

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 13:44:25 +08:00
junjunshan1
7dd35cb72e hv: Fix identifier reuse
Now we have name reuse definitions in hypervisor as following:
"enum cpu_state cpu_state" in per_cpu.h,
"struct shell_cmd *shell_cmd" in shell_priv.h.
MISRAC requires that tag names shall not be reused anywhere
with in a program.So these definitions violate MISRAC rules
"identifier resue".This patch is used to fix it.

1. modify the definitions to "enum pcpu_boot_state boot_state"
and "struct shell_cmd *cmds".
2. modifty the relevant usage.

v1->v2
    update commit message to be more explicit.

v2->v3
    update the enum definition.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 09:04:34 +08:00
Yin Fengwei
dbd9ab07e1 hv: Cleanup: Remove dead code.
Now, UOS will use hypercall to init BSP state, we could remove
set_bsp_real_mode_entry() and set_bsp_protect_mode_regs().

For SOS, GDT will inherit from SBL or UEFI. For UOS, DM will
prepare GDT. We don't need hypervisor to prepare GDT for guest.

The entry_addr of vcpu struct could be removed. The guest entry
is set through BSP rip register.

GUEST_CFG_OFFSET is not needed any more after this patchset.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 09:04:10 +08:00
Yin Fengwei
b1ccde55a8 hv: Cleanup: set vcpu mode in vcpu_set_regs
Move vcpu mode set to function vcpu_set_regs.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 09:04:10 +08:00
Yin Fengwei
113adea0de hv: not start vm automatically when reset vm
For UOS, there is no BSP init state saved in hv. We always need
DM to set BSP init state by using hypercall. So we can't auto
start vm during vm reset.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 09:04:10 +08:00
Yin Fengwei
b454a067be hv: remove the vm loader for UOS in hv.
Now, we make UOS to set BSP init state by using hypercall. We
could drop the old UOS loader in HV and make vm loader in HV
only for SOS.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 09:04:10 +08:00
Yin Fengwei
3cfbc004f5 hv: add hypercall to set vcpu init state
DM will use this hypercall to initialize the UOS BSP state.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-15 09:04:10 +08:00
Junjie Mao
66b53f8248 kconfig patch
Use customized function to generate proper config.h
which depend on kconfig,write the customized format
to support it.

V1->V2:
    Add comments.

Tracked-On: #861
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2018-10-12 16:32:25 +08:00
Yu Wang
7f2b9a1c7d hv: virq: update apicv irr/rvi before handle vmcs event injection
From SDM Vol3 26.3.2.5:
Once the virtual interrupt is recognized, it will be delivered in VMX
non-root operation immediately after VM entry(including any specified
event injection) completes.

So the hardware can handle vmcs event injection and evaluation/delivery
of apicv virtual interrupts in one time vm-entry.

This patch move the apicv irr/rvi sync before handle vmcs events
injection. The old code cause the apicv virtual interrupt evaluation and
delivery be handled until next vm-exit if met pending exceptions.

Tracked-On: #1443
Signed-off-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-12 16:30:57 +08:00
Yin Fengwei
90eca21d16 hv: simplify the function init_guest_state
The vcpu state is initialized outside of init_guest_state:
 - SOS BSP state is initialized in SOS loader
 - UOS BSP state is initialized in UOS loader
 - AP state is initialized during SIPI signal emulation

We could make init_guest_state only update the vcpu state
to VMCS structure.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-12 16:27:45 +08:00
Yin Fengwei
a5fc3e5eac hv: Add function to set UOS BSP init state
NOTE: this patch is only workaround patch for UOS BSP state init.
Eventually, the DM will call hypercall to init UOS BSP state.

We use this workaround patch here to simplify the init_guest_state.
Will make the caller of init_guest_state calls init_guest_vmx
directly.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-12 16:27:45 +08:00
Yin Fengwei
08c13a9ea8 hv: Update SOS BSP to use new API to init BSP state
We move the SOS BSP state init to vm loader and drop
function init_guest_context_vm0_bsp.

Update the definition of vm0_boot_context to fix code
violations.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-12 16:27:45 +08:00
Yin Fengwei
26627bd1fc hv: add function to set AP entry
With reset_vcpu_regs as pre-condition, we only need to set
cs_selector and cs_base for AP.

We call set_ap_entry in two places:
 1. When emulation AP SIPI
 2. When sos BSP resume from S3. The BSP is resumed to real
    mode with entry set to wakeup_vec. We call set_ap_entry
    API here with entry twisted from wakeup_vec.

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-12 16:27:45 +08:00
Yin Fengwei
f7b11c8341 hv: add function to reset vcpu registers
This reset_vcpu_regs function will reset the vcpu registers to
default value: realmode with entry 0xFFFFFFF0

Make call to reset_vcpu_regs during create_vcpu and reset_vcpu

Tracked-On: #1231
Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-12 16:27:45 +08:00
Mingqiang Chi
790d8a5ce7 hv:Remove CONFIG_VM0_DESC
If defined CONFIG_VM0_DESC, HV will use predefined vm0_desc
to config VM0,now it is unneccessary, then remove these code.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-12 14:41:48 +08:00
Yang, Yu-chu
c3ebd6f3ba HV: get tss address from per cpu data
TR selector initianlization using pre-defined HOST_GDT_RING0_CPU_TSS_SEL
rather than loading from register. Instead calculating real base address
of TSS based on TR selector and gdt, getting it from per cpu data.

Tracked-On: #1394
Signed-off-by: Yang, Yu-chu <yu-chu.yang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-10-12 09:59:39 +08:00
Shiqing Gao
0317cfb2b6 hv: fix 'No brackets to then/else'
- add missing brackets for 'if/else' statements based on MISRA-C
  requirements

v1 -> v2:
 * add brackets for each conditions in 'if' statements to improve
   the readability
 * modify 'ptdev_init' to make the logic clearer

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-10-11 16:48:11 +08:00
Xiangyang Wu
a11a10fa4e HV:MM:gpa2hpa related error checking fix
In the current hypervisor design, when HPA is not
found for the specified gpa by calling gpa2hpa or
local_gpa2hpa, 0 will be returned as a error code,
but 0 may be a valid HPA for vm0; error checking
is missed when invoking gpa2hpa or local_gpa2hpa;
when invoking lookup_address, the caller guarantees
that parameter pointer pml4_page and pointer pg_size
is not NULL.

If local_gpa2hpa/gpa2hpa returns a invalid HPA,
it means that this function fails to find the
HPA of the specified gpa of vm. If local_gpa2hpa/gpa2hpa
return value is a valid HPA, it means that this
function have found the HPA of the specified gpa of vm.

Each valid vm's EPTP is initialized during vm creating,
vm's EPTP is valid until this vm is destroyed. So the caller
can guarantee parameter pointer pml4_page is not NULL.
The caller uses a temporary variable to store page size.
So the caller can guarantee parameter pointer pg_size
is not NULL.

In this patch, define a invalid HPA for gpa2hpa and
local_gpa2hpa;add some error checking when invoking
local_gpa2hpa/gpa2hpa;add precondition for lookup_address
function and remove redundant error checking.

V1-->V2:
	Define INVALID_HPA as a invalid HPA for gpa2hpa
	and local_gpa2hpa;
	Updated related error checking when invoking
	gpa2hpa or local_gpa2hpa;
V2-->V3:
	Add some debug information if specified gpa2hpa
	mapping doesn't exit and ept_mr_del is called;
	Update INVALID_HPA definition easier to be reviewed.
V3-->V4:
	Add vm->id and gpa into pr_error;
	Add precondition to ept_mr_del to cover [gpa,gpa+size)
	unmapping case.
V4-->V5:
	Update comments;
	Update pr_error message.

Tracked-On: #1258

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Reviewed-by: Li, Fei1 <fei1.li@intel.com>
2018-10-11 15:16:11 +08:00
Shiqing Gao
041bd594ae hv: improve the readability of ept_cap_detect
- improve the readability of ept_cap_detect
  right shift 32 bits of msr_val to check bits 63:32 of msr_val

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-11 15:15:11 +08:00
Huihuang Shi
c5f4c5109c HV:fix type related violations
1.Function return type inconsistent
2.cast on a constant value

V1->V2 add () to return type
V2->V3 keep the sbuf_get and sbuf_put return code

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-10 13:02:00 +08:00
Huihuang Shi
723c22fc7f HV:fix expression is not boolean
Expression should be boolean immediate before 'if','while' key-words.
V1->V2 add () to bool expression

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-10-10 13:02:00 +08:00
Li, Fei1
cc89e52d5b hv: mmu: make page table operation no fault
Page table operation would not fault except:
1. the hypervisor it out of memory to allcate a page for page table operation
2. there is a bug with page table operation in hypervisor or devicemodle
While we assue that these would not happened in our platform when release, so
there is no need to check whether there is a fault with page table operation. However,
for debug version, we would panic the hypervisor if we can't meet the conditions really.

Tracked-On: #1124
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
2018-10-10 09:36:51 +08:00