Commit Graph

179 Commits

Author SHA1 Message Date
Shiqing Gao
026ae83bd5 hv: include: fix 'Unused procedure parameter'
MISRA-C requires that there should be no unused parameters in
functions.

This patch removes the unused parameters that is not being used
unconditionally.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-27 10:46:52 +08:00
Shiqing Gao
8787c06d3b hv: arch: fix 'Unused procedure parameter'
MISRA-C requires that there should be no unused parameters in
functions.

In some cases, we will keep the unused parameters.
vmexit handler is one example. It is used as function pointer.
Some of the vmexit handlers use the input parameter 'vcpu', some of
them don't. We still need to keep the unused parameters 'vcpu' for
those handlers don't use 'vcpu'.

This patch removes the unused parameters that is not being used
unconditionally.

v1 -> v2:
 * remove the non-implemented API 'vlapic_id_write_handler'

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-26 10:48:55 +08:00
Minggui Cao
918403f925 HV: modify code for intr storm detect & handling
This patch is to enhance the feature of "interrupt storm
mitigation"; when interrupt storm happens on one UOS
it should keep as smaller effect to SOS as possible.

Add variables in PTdev entry & VM, used to record one
UOS's pass-thru devices' interrupt data; add a function
to collect the data.

Also add a timer used to delay UOS pass-thru devices'
interrupt injection if an "interrupt storm" detected
by SOS.

Tracked-On: #866
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-09-25 11:09:35 +08:00
Shiqing Gao
9d602208e5 hv: remove unused MACROs
MISRA-C states that redundant macros reduce the maintainability of code.

In some cases, we would like to keep the current unused macros for code
completeness, such as cpu registers. These macros might be used later.

This patch removes some unused macros that is not critical for code
completeness.

v1 -> v2:
 * Keep TRUSTY_VERSION in trusty.c.
   Yadong will cook another patch which will utilize TRUSTY_VERSION.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 09:43:43 +08:00
Xiangyang Wu
bb0a2bc2ab HV:Hypercall:Remove redundant error checking
In the current hypervisor hypercall, first all vcpu is
allocated to SOS, vcpu's vm field is initialized to vm0.
When the vcpu is offlined, vcpu will be paused and vcpu's
vm field is set as NULL by DM. When UOS is created, vcpu's
vm field is set as UOS's vm. So when vmcall_vmexit_handler
is invoked, vcpu's vm filed is always non-NULL.
error checking for vm pointer is done in the function
"vmcall_vmexit_handler", vmcall_vmexit_handler will
guarantee that vm is vm0.

So all hypercall functions (these functions is just for handler
hypercall, except vmcall_vmexit_handler) don't need to check
whether invoking vm is NULL and don't need to check whether
invoking vm is vm0 or not.

Remove related invoking vm error checking for hypercall handling.

V1 --> V2:
	Add pre-condition for hypercall in the head file.
V2 --> V3:
	Add pre-condition for copy_from_gpa and copy_to_gpa.
V3 --> V4:
	Add pre-condition both in the head file and source file.

Tracked-On:#1258

Signed-off-by: Xiangyang Wu <xiangyang.wu@linux.intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-18 09:43:24 +08:00
Junjun Shan
83d1ddc6d8 hv:Delete the dead code
Delete the dead code get_irq_info(), local_get_irq_info() in io_request.c
and definition in guest.h.

v1->v2
 *the dead code used pointers which not checked before use, therefore it
  causes "pointer not checked for null before use". To make it clearly,
  modify the subject to "delete the dead code" directly.

 *remove dead code local_get_irq_info() in io_request.c and definition
  in guest.h together.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-17 09:52:02 +08:00
Junjun Shan
4fd5102edc hv:treewide:fix multiple MISRAC violations
MISRAC has requirements about literal value requires a U suffix and
signed/unsigned conversion with cast. This patch is used to solve
these violations.

v1->v2
 *Drop the cast of sz from uint32_t to int32_t, the signed/unsigned
  violation of nchars will be solved by other patch together with
  printf/sprintf/console/vuart/uart code.

 *Delete the unnecessary L suffix of shifting operand.

Tracked-On: #861
Signed-off-by: Junjun Shan <junjun.shan@intel.com>
Reviewed by: Junjie Mao <junjie.mao@intel.com>
2018-09-13 11:12:29 +08:00
Mingqiang Chi
60c05ace1a hv:Replace vlapic pointer with instance in vcpu_arch
-- update 'vlapic' in 'struct vcpu_arch' from pointer
   to instance
-- add inline function(vcpu_vlapic) in vcpu.h

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-12 09:20:07 +08:00
Mingqiang Chi
f744762ad3 hv:Remove redundancy 'vlapic' in 'struct vcpu'
It has been defined in 'struct vcpu_arch'

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-12 09:20:07 +08:00
Mingqiang Chi
aae5018bec hv:Move vlapic structure to vlapic.h
move structure vlapic_pir_desc/vlapic_timer/
acrn_vlapic from vlapic_priv.h to vlapic.h

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-12 09:20:07 +08:00
Mingqiang Chi
887ebf0b08 hv: Replace dynamic memory allocation for MSR bitmap
Replace pointer with static memory for msr_bitmap
inside structure vm_arch.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-12 09:20:07 +08:00
Mingqiang Chi
02e7edc063 hv: Replace dynamic memory allocation for I/O bitmaps
-- Replace pointer with static memory for io_bitmap
  inside structure vm_arch.
-- Refine allow_guest_pio_access/deny_guest_pio_access

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-12 09:20:07 +08:00
Mingqiang Chi
eada04b800 hv:Replace dynamic memory allocation for vmcs region
Replace vmcs pointer with static memory for vmcs region
inside structure vcpu_arch.

Tracked-On: #861
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-12 09:20:07 +08:00
Shiqing Gao
bcaede0c0e hv: treewide: fix 'Use of function like macro'
- convert function like macros to inline functions based on MISRA-C
  requirement
- remove some unused and duplicated macros

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-09-11 10:49:48 +08:00
Jason Chen CJ
457ac7408d vcpu: replace start_vcpu with run_vcpu
run_vcpu should be a more suitable name

Tracked-On: #1199
Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
2018-09-11 10:47:34 +08:00
Minggui Cao
99285f844a HV: improve pass-thru device interrupt process
for each pass-thru device and its entry owned by one VM, so
change the pass-thru device's softirq lock & entry list into
per VM, so one VM's PT device interrupt process will not
interfere with other VMs; especially in case one user OS
"interrupt storm" happens, it will have little effect on
service OS.

Tracked-On: #866
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-10 10:12:45 +08:00
Shiqing Gao
4360235edf hv: treewide: fix 'Macro parameter not in brackets'
Add the brackets for Macro parameter to avoid the unintentional
mistakes.

A simple example that may cause mistakes:
        #define minus(x) -x
When the following call is made,
        z = minus(a-b)
it becomes:
        z = -a-b;
where "-a - b" is equivalent to "(-a) - b" rather than "- (a - b)", as
expected.

v2 -> v3:
 * convert DMAR_WAIT_COMPLETION to inline function
 * remove the macro PIC_PIN_FOREACH and implement the well-formed
   for loop in each case
 * replace __CPP_STRING with STRINGIFY and remove the unused CPP_STRING

v1 -> v2:
 * Remove some changes to function like macro since MISRA-C requires to
   use inline functions if it is possible.
   These MACRO brackets violations will be fixed together when fixing
   other issues related to function like macro.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-09-07 10:22:00 +08:00
Shiqing Gao
f2f719cfa8 hv: fix 'Procedure is not called or referenced in code analysed'
MISRA-C requires that each function defined and declared shall be called
or referenced in code analyzed.

In some cases, we would like to keep the non-called functions for code
completeness, such as
vcpu_inject_extint/vcpu_inject_nmi/vcpu_inject_gp/vcpu_inject_pf
/vcpu_inject_ud/vcpu_inject_ac/vcpu_inject_ss.

This pacth removes some functions that are independent and are not
called in our code base.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-09-06 12:01:30 +08:00
Shiqing Gao
54439ecae1 hv: treewide: fix 'Expression is not Boolean'
MISRA-C requires that the controlling expression of an if statement or
an iteration-statement shall be Boolean type.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-09-03 11:23:53 +08:00
Shiqing Gao
2a184f353c hv: code clean up regarding to guest_msrs
Change guest_msrs in vcpu data structure from pointer to array, which
could avoid the dynamic memory allocation.

v1 -> v2:
 * Remove the unnecessary initialization for guest_msrs[] since vcpu is
   allocated by calloc.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-28 11:08:48 +08:00
Mingqiang Chi
4e8798e018 hv:Replace vioapic pointer with instance in structure vm
-- rename struct vioapic --> struct acrn_vioapic
-- update 'vioapic' field in 'struct arch_vm' from pointer
   to instance
-- change vm_ioapic(vm) to inline, and move it to vm.h
-- change vioapic_init to void type

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-27 09:49:12 +08:00
Mingqiang Chi
29dbd1084d hv:Replace vuart pointer with instance in structure vm
-- update 'vuart' field in 'struct vm' from pointer
   to instance
-- replace MACRO with inline function for vm_vuart,
   and move it to vm.h
-- change vuart_init to void type
-- rename struct vuart -->struct acrn_vuart

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-27 09:49:12 +08:00
Mingqiang Chi
0b54946bac hv:Replace vpic pointer with instance in structure vm
-- update 'vpic' field in 'struct vm' from pointer
  to instance, and move it from 'struct vm' to 'struct arch_vm'
-- replace MACRO with inline function for vm_pic, and move it
   to vm.h
-- changed vpic_init to void type
-- removed vpic_cleanup
-- move struct acrn_vpic/i8259_reg_state from vpic.c to vpic.h

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-27 09:49:12 +08:00
Yonghua Huang
7bc1a3f925 HV: Refine APICv capabilities detection
- by default, ACRN will not support platform without
   below APICv features:
    -- Use TPR shadow
    -- APIC-register virtualization

 - remove mmio emualtion of local APIC for guest

Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-24 09:58:58 +08:00
Yu Wang
a0c625b85a hv: apicv: change the apicv related API with vlapic_apicv prefix
The apicv is one hardware acceleration feature of vlapic. All vlapic
APIs should keep vlapic_ as the prefix.

Signed-off-by: Yu Wang <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-23 08:55:30 +08:00
Mingqiang Chi
c43d0e4f01 hv:Changed several APIs to void type
Since these APIs always return 0,
change them to void type,
vcpu_set_cr0()
vmx_write_cr0()
vcpu_set_cr4()
vmx_write_cr4()
kick_notification()
tsc_deadline_handler()
dmar_fault_handler()
ptdev_interrupt_handler()

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-23 08:54:54 +08:00
Shiqing Gao
3e598ebb28 hv: fix 'No definition in system for prototyped procedure'
Remove the functions without definition.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-08-22 13:11:25 +08:00
Shiqing Gao
8924f6dabb hv: vmx: fix 'Array has no bounds specified'
MISRAC requires that the array size should be declared explicitly.

This patch fixes the issues caused by vm0_boot_context.

Fix pattern is like below:
   extern char start_of_ROM, end_of_ROM, start_of_FLASH;
   memcpy (& start_of_FLASH, & start_of_ROM, & end_of_ROM - &
start_of_ROM);

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-08-21 13:03:28 +08:00
Shiqing Gao
7a4dcfcc1a hv: treewide: fix 'Function prototype/defn param type mismatch'
Fix the parameter type mismatch between API declaration and definition.

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-21 09:55:12 +08:00
Shiqing Gao
431ef57076 hv: vioapic: fix 'No definition in system for prototyped procedure'
Remove two APIs without definition

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
2018-08-21 09:53:55 +08:00
Minggui Cao
b37008d74e HV: check secure/normal world for EPTP in gpa2hpa
for secure and normal world has different EPTP, in secure world,
it could trap to hypervisor and call gpa2hpa function. So it need
check if it is in normal or secure world for EPTP selection.

Detailed explanation from Yadong Qi <yadong.qi@intel.com>:
Currently, trusty OS does not handle interrupt, so when an interrupt
is delivering in trusty, trusty will set it to LAPIC IRR register by
inject self_ipi() and then call world_switch to switch to Android,
So android will receive/handle the interrupt properly.Since the
vLAPIC is enabled in ACRN, so when trusty try to inject self_ipi(),
APIC-ACCESS vmexit will happen. Then ACRN will do instruction
decode/emulation, so the GPA2HPA will fail since page walk is using
nworld_eptp. It is probability an issue.

Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-17 14:31:43 +08:00
Arindam Roy
d3db5a6705 HV: Add const qualifiers where required
V1:
In order to better comply with MISRA C,
add const qualifiers whereeven required.
In the patch, these are being added to pointers
which are normally used in "get" functions.

V2: Corrected the issues in the patch
pointed by Junjie in his review comments.
Moved the const qualifiers to the correct
places. Removed some changes which are not
needed.

V3: Updated patch comment.
This modifies a subset of all the functions
which might need constant qualifiers
for the their parameters.
This is not and exhaustive patch. This only
targets obvious places where we can use
the const qualifier. More changes will be
submitted in future patches, if required.

Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2018-08-17 10:02:12 +08:00
Sainath Grandhi
022ef92b62 hv: Add vrtc emulation support for ACRN partition mode
This patch adds code to support read-only RTC support for guests
run by partition mode ACRN. It supports RW for CMOS address port 0x70
and RO for CMOS data port 0x71. Reads to CMOS RAM offsets are fetched
by reading CMOS h/w directly and writes to CMOS offsets are discarded.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-16 16:23:11 +08:00
Mingqiang Chi
de487fff2b hv:fix return value violations for vpic/vioapic
-- Change these APIs to void type, add pre-conditions,
   and move parameter-check to upper-layer functions.
   handle_vpic_irqline
   vpic_set_irqstate
   vpic_assert_irq
   vpic_deassert_irq
   vpic_pulse_irq
   vpic_get_irq_trigger
   handle_vioapic_irqline
   vioapic_assert_irq
   vioapic_deassert_irq
   vioapic_pulse_irq
-- Remove dead code
   vpic_set_irq_trigger

v1-->v2:
   add cleanup vpic
   change some APIs to void type, add pre-conditions,
   and move the parameter-check to upper-layer functions.

Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2018-08-16 09:01:08 +08:00
Jason Chen CJ
f8f49d410f dump vcpu registers on correct vcpu
after updated cpu context get/set method, the vcpu_dumreg cmd is not
correct anymore as the registers may read from VMCS but meantime hv
shell may not be running on target vcpu.

this patch take use of smp_call_function for vcpu dumpreg and make the
dump always come from correct vcpu.

v2:
- use str pointer to get vcpu_dumpreg context instead of print out directly
  in notify handler.

Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-15 12:05:18 +08:00
Binbin Wu
69522dc861 hv: move boot_ctx offset definitions
Move the definitions of offset of fields in boot_ctx to the same header
file that the struct boot_ctx is in, to reduce the possibility that some
modification would make the offset inconsistant with the fields within
the structure.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-14 13:05:06 +08:00
Sainath Grandhi
c25a62e5b0 hv: Create E820 entries for OS in partitioning mode ACRN
1) This patch creates static E820 entries for VMs launced by ACRN in
partition mode.
2) Moves vm_description entries from bsp/sbl/ to partition/
3) Removes unused API get_vm_desc_base

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-13 13:58:32 +08:00
Sainath Grandhi
7380c167ed hv: Add vuart flag to VM descriptions in partition mode
ACRN in partition mode emulates UART for the VMs directly launced
from HV. This patch adds an option to enable/disable vUART for a
VM.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-13 09:34:35 +08:00
Sainath Grandhi
e40b998d21 hv: Add EPT mapping for UOS in partitioning mode
Adding code to map memory for UOS in partitioning mode ACRN.
HPA starting above 4GB is used for UOS memory. Supports only contiguous memory
from host for UOS. Current implementation supports only 2 GB for UOS memory.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-10 10:22:06 +08:00
Shiqing Gao
40196d16af hv: treewide: fix 'inline function should be declared static'
MISRAC does not allow the use of an inline function with external
linkage.

What this patch does:
- Add the static keyword for the function that is only used in the
  definition file.
- Remove the inline keyword for the function that is used in multiple
  files.

v1 -> v2:
 * Move some functions to headers as static inline function if it is
    possible

Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
2018-08-10 10:16:04 +08:00
dongshen
f60fcb6b16 HV: Defining the per-vm static vpci table for partition hypervisor
V4:
- Renamed members for struct pcibar
- License header fix
- Added vpci_vdev_array to struct vm_description

V3:
 - Defined the static centralized vpci table to reduce code size,
   previously many of the settings are obtained/generated dynamically

Reviewed-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2018-08-10 10:09:00 +08:00
Binbin Wu
33e1149b29 hv: init: unify init logic for vm0 bsp
In current code, VM0 BSP start mode is hardcoded, in this patch VM0 BSP
start mode is decided by the boot context prepared by bootloader/BIOS.

In current code, VM0 BSP VMCS is override only on UEFI platform.
In this patch, VM0 BSP VMCS is override on both SBL & UEFI platforms.

Also restructure the code of guest init code.
In this patch, a vcpu run_context is initilaized first according to vcpu mode.
Then write the value to vmcs according to run_context value.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 16:43:58 +08:00
Binbin Wu
4acce9338a hv: move save_segment/load_segment to a header file
save_segment/load_segment is common code and can be used outside of trusty,
move to a header file.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 16:43:58 +08:00
Binbin Wu
43db87cfed hv: rename acrn_efi.h to vm0_boot.h
The structures defined in acrn_efi.h is x86 related, move it
to acrh/x86/guest/.
Also, the headfile will be used on both SBL & UEFI platforms,
rename it to vm0_boot.h

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 16:43:58 +08:00
Binbin Wu
adddf512a6 hv: move define of struct cpu_gp_regs to a separate headfile
EFI stub code need to reference to the struct cpu_gp_regs, which
is currently defined in vcpu.h, however include vcpu.h in EFI stub code
will include other header files not requried by EFI stub code.
After moving the define of struct cpu_gp_regs to a separate
headfile, the file can be included in EFI stub code without other header
files.

Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 16:43:58 +08:00
Qi Yadong
2fc3bdec40 HV: trusty: new hypercall to save/restore context of secure world
New field in VM's structure:
    sworld_snapshot: save cpu_context of secure world.

New hypercall: HC_SAVE_RESTORE_SWORLD_CTX
    In UOS S3 suspend path: trusty kernel driver will call this hypercall
    to require Hypervisor save context of secure world.
    In UOS S3 resume path: virtual firmware will call this hypercall to
    require Hypervisor restore context of secure world.

New bit in secure_world_control.flag:
    ctx_saved: indicate whether cpu_context of secure world is saved.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 15:09:15 +08:00
Qi Yadong
b5b769f45a HV: trusty: refine secure_world_control
Define Bitmap flag to indicate secure world's state:
    supported: 0(not supported), 1(supported)
    active:    0(inactive), 1(active)

Refine secure_world_memory:
    base_gpa_in_sos: base_gpa from SOS's view
    base_gpa_in_uos: base_gpa from UOS's view, this is the original base_gpa
                     allocated by bootloader.
    Recording above GPA is for usage of trusty EPT destroy and re-create.
    There is an assumption: the secure world's memory address is contiguous
    in both SOS and physical side.

Signed-off-by: Qi Yadong <yadong.qi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-08-09 15:09:15 +08:00
Sainath Grandhi
ff96453993 hv: Boot multiple OS for Partitioning mode ACRN
ACRN in partitioning mode boots multiple OS. Adding code to parse
VM description structure and a reference description structure for
booting 2 OSes.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-09 15:01:57 +08:00
Yin Fengwei
63fe48c27f hv: get correct fault address for copy_to/from_gva
When doing copy_to/from_gva, it's possible the guest no page
happens on none-first page. In this case, we need get correct
fault address from gva2gpa.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2018-08-09 14:46:13 +08:00
Sainath Grandhi
04b4c9110c hv: Adding a wrapper on top of prepare_vm0
Added prepare_vm function as a wrapper function on top of prepare_vm0.
This makes adding support for partition mode ACRN to boot multiple
VMs from HV cleaner.

Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
2018-08-08 15:53:46 +08:00