Commit Graph

5887 Commits

Author SHA1 Message Date
Junjie Mao
c507acb6ab Makefile: do not define default BOARD/SCENARIO in top-level Makefile
The top-level Makefile should not define any default value as the
hypervisor may have its own configurations set by previous builds.

This patch also changes the hypervisor default RELEASE to `n`.

Tracked-On: #5772
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-03-03 15:50:01 +08:00
Junjie Mao
73a85e425e Makefile: fixes to bugs that break diffconfig and applydiffconfig
This patch resolves the following bugs that break the targets `diffconfig`
and `applydiffconfig`:

 - Comments after variable definitions cause the varaible to contain
   unintended trailing whitespaces.

 - HV_CONFIG_XML is no longer defined; it is now HV_SCENARIO_XML.

 - '*.asl' files are also generated and should be involved when comparing
   the generated configuration files.

 - Strings between diacritic marks (`) are intepreted as shell commands
   even they are part of informative messages.

 - HV_DIFFCONFIG_LIST should not contain duplicated lines.

Tracked-On: #5772
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-03-03 15:50:01 +08:00
Junjie Mao
d5f1a44d65 Makefile: prefer RELEASE=y|n over RELEASE=0|1
For clarity, we now prefer y|n over 0|1 as the values of boolean options on
make command lines. This patch applies this preference to the Makefile of
the device model and tools, while RELEASE=0|1 is still supported for
backward compatibility.

Tracked-On: #5772
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-03-03 15:50:01 +08:00
Junjie Mao
b5a97d1dfa Makefile: remove unnecessary exports
We already passes BOARD, SCENARIO and RELEASE to recursive `make`, which
makes it unnecessary to export those variables. This patch explicitly
passes TOOLS_OUT as well and removes the explicit export for clarity.

Tracked-On: #5772
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-03-03 15:50:01 +08:00
Yonghua Huang
605b169584 hv: fix potential crash in write_protect_page()
This hypercall handler may result in hypervisor
  crash when an invalid 'gpa' is set, e.g. set its
  top reserved bits.

  This patch adds one more sanity check on input
  'gpa' address from service VM to avoid potential
  hypervisor crash.

Tracked-On: #5802
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2021-03-03 13:47:20 +08:00
Yang,Yu-chu
6ec26987da config-tools: Add "ENFORCE_TURNOFF_AC" capability to xml
Add the capability to disable or enable #AC for Split-locked Access
through <scenario>.xmls. This was implemented through Kconfig. Move this
configuration from Kconfig to xmls.

Tracked-On: #5798
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
2021-03-03 09:32:56 +08:00
Peter Fang
5070d556e4 misc: life_mngr: allow only one active socket connection in SOS mode
Monitor the listening socket in SOS mode and close any additional
connections after a socket connection is established. This ensures no
more than one post-launched VM can establish a pm_vuart channel.

Tracked-On: #5736
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-03-01 14:21:04 +08:00
Peter Fang
e40d9d3b6c dm: graceful failure in pm_vuart
- Exit main() if pm_by_vuart_init() fails
- Use SIGHUP to gracefully power off a VM if pm_monitor_loop()
  encounters a failure
- Identify a closed socket as a failure in pm_monitor_loop()

Tracked-On: #5736
Signed-off-by: Peter Fang <peter.fang@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-03-01 14:21:04 +08:00
Shuang Zheng
844f2e8fd4 config_tools: add sanity check for PSRAM and RDT
RDT_ENABLED and PSRAM_ENABLED should not by y simultaneously.

Tracked-On: #5649

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Mao, Junjie <junjie.mao@intel.com>
2021-02-26 16:52:41 +08:00
Yang,Yu-chu
5e9e3b5f74 config-tools: remove "vuart" poweroff channel from default xml
Remove the the vuart1(tty) and vuart1(pty) poweroff channel from default
non-windows uos launch script xmls.

Tracked-On: #5736
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
2021-02-26 16:51:27 +08:00
Shuang Zheng
d1e923b96b config_tools: update sbl version of ehl-crb-b.xml
update sbl version of ehl-crb-b.xml.

Tracked-On: #5778

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-26 16:42:05 +08:00
Yonghua Huang
30497bdb85 hv: unmap software region of pre-RTVM from Service VM EPT
Accessing to software SRAM region is not allowed when
 software SRAM is pass-thru to prelaunch RTVM.

 This patch removes software SRAM region from service VM
 EPT if it is enabled for prelaunch RTVM.

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-02-25 13:21:41 +08:00
Yonghua Huang
f7842878ae config-tool: refine software SRAM config of pre-RTVM
- Define 'PRE_RTVM_SW_SRAM_ENABLED' only if both
     prelaunch RTVM and Software SRAM are configured in
     current scenario.

   - Define 'PRE_RTVM_SW_SRAM_BASE_GPA' and
     'PRE_RTVM_SW_SRAM_END_GPA' only if
     'PRE_RTVM_SW_SRAM_ENABLED' is defined.

Tracked-On: #5649
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2021-02-25 13:21:41 +08:00
Victor Sun
5b8610352a dm: remove _ADR object for PCI Device
Per ACPI 6.x chapter 6.1, "A device object must contain either an _HID object
or an _ADR object, but should not contain both."

Remove this object otherwise iasl would complain
"Warning  3073 -   Multiple types ^  (Device object requires either a _HID
or _ADR, but not both)"
when launch post-launched VM in devicemodel.

Tracked-On: #5719

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-02-25 13:20:49 +08:00
Victor Sun
360def7f6f dm: declare Processors using the Device operator
Per ACPI 6.x chapter 19.6.109, the Processor Operator is deprecated.
Replace it with Device Operator, otherwise the iasl would complain
"Warning  3168 -
	 Legacy Processor() keyword detected. Use Device() keyword instead."
when launch post-launched VM in devicemodel.

Tracked-On: #5719

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
2021-02-25 13:20:49 +08:00
Victor Sun
ce9d5e8779 HV: remove efi support for SOS
Provide EFI support for SOS could cause weird issues. For example, hypervisor
works based on E820 table whereras it's possible that the memory map from EFI
table is not aligned with E820 table. The SOS kernel kaslr will try to find the
random address for extracted kernel image in EFI table first. So it's possible
that none-RAM in E820 is picked for extracted kernel image. This will make
kernel boot fail.

This patch removes EFI support for SOS by not passing struct boot_efi_info to
SOS kernel zeropage, and reserve a memory to store RSDP table for SOS and pass
the RSDP address to SOS kernel zeropage for SOS to locate ACPI table.

The patch requires SOS kernel version be high than 4.20, otherwise the kernel
might fail to find the RSDP.

Tracked-On: #5626

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-02-25 09:34:29 +08:00
Victor Sun
ae7eb25a7f HV: panic on 0 address when do e820_alloc_memory
Current memory allocation algorithm is to find the available address from
the highest possible address below max_address. If the function returns 0,
means all memory is used up and we have to put the resource at address 0,
this is dangerous for a running hypervisor.

Also returns 0 would make code logic very complicated, since memcpy_s()
doesn't support address 0 copy.

Tracked-On: #5626

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-02-25 09:34:29 +08:00
Victor Sun
ff1f6bc975 HV: refine acpi rsdp initialize interface
In previous code, the rsdp initialization is done in get_rsdp() api implicitly.
The function is called multiple times in following acpi table parsing functions
and the condition (rsdp == NULL) need to be added in each parsing function.
This is not needed since the panic would occur if rsdp is NULL when do acpi
initialization.

Tracked-On: #5626

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-02-25 09:34:29 +08:00
Victor Sun
59de88d6bc HV: merge multiboot standard data structures in one header
In this way, all multiboot standard data structure could be found in
multiboot_std.h. The multiboot_priv.h stores all private definitions
and multiboot.h is the only public API header file.

Tracked-On: #5661

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-02-25 09:34:29 +08:00
Liu Long
91be756d3b DM: xHCI: Fix the USB3.2 device recognition problem.
The device descriptor describes general information about a device,
the bcdUSB field contains a BCD version number. The version 3.2 is
represented with value of 0x320H. Add the missed BCD version in the
bcdUSB case statement. And modify the return value of address device
command in case create device failed.

Tracked-On: #5712
Signed-off-by: Liu Long <long.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2021-02-25 09:18:55 +08:00
Yang,Yu-chu
bc22a62b4d config-tools: ivshmem support to be shared by multiple vms
Loosen the restriction of IVSHMEM_REGION of xsd validation. An ivshmem
region can be shared by more than two vms.

Tracked-On: #5672
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
2021-02-24 09:34:28 +08:00
li shuang
8254b2be65 config_tools: add PTCT configs
add PTCT table template on ehl-crb-b, update PTCT table template
on tgl-rvp, add SofwareSRAM in ehl-crb-b.xml

Tracked-On: #5649

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-24 09:27:07 +08:00
Shuang Zheng
23cd1dcb90 config_tools: fix VM boot issue for fusa_partition scenario
update kern_mod to RT_bzImage in VM1, update memory size of
VM0 to avoid memory conflict.

Tracked-On: #5665

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-24 09:22:19 +08:00
Peter Fang
0eeec2d058 OVMF release v2.4
- Ensure successful USB enumeration
- Enable UsbMassStorageDxe

Tracked-On: #5732
Signed-off-by: Peter Fang <peter.fang@intel.com>
2021-02-18 10:34:29 +08:00
Shuang Zheng
1478ab25af config_tools: update fusa_partition scenario
update fusa_partition scenario following requirements.

Tracked-On: #5665

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-10 11:28:01 +08:00
Shuang Zheng
ca5ff7eba6 config_tools: change generic folder to generic_board folder in config app
change generic folder to generic_board folder in config app according
to the reorg data folders and update the method to save xmls.

Tracked-On: #5723

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-09 13:27:45 +08:00
Shuang Zheng
30784ad6f1 config_tools: update zephyr entry point address on ehl-crb-b
update entry point address for pre-launched zephyr on ehl-crb-b;
update serial console to /dev/ttyS3 on ehl-crb-b.

Tracked-On: #5689

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-09 08:59:01 +08:00
Shuang Zheng
bc5e472185 config_tools: update condition for bootargs error check
add bootargs error check only when kernel type is KERNEL_BZIMAGE.

Tracked-On: #5689

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-09 08:59:01 +08:00
Victor Sun
f44fb6856b HV: init VM bootargs only for LaaG
Currently the VM bootargs load address is hard-coded at 8KB right before
kernel load address, this should work for Linux guest kernel only. Linux
kernel bzImage boot protocol guarantees its load address to be high than
GPA 8K so the address would never be overflowed, other OS like Zephyr
has no such assumption.

Tracked-On: #5689

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2021-02-09 08:59:01 +08:00
Shuang Zheng
8af704beec config_tools: is_tpm_passthru is checked by scenario config
add check for is_tpm_passthru by tpm config from scenario
config.

Tracked-On: #5710

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-07 10:25:04 +08:00
Yang,Yu-chu
236a6f52a7 config-tools: add validate_scenario_schema
add validate_scenario_schema to validate_scenario_setting and update the
excption handling.

Tracked-On: #5672
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
2021-02-07 10:15:04 +08:00
Yonghua Huang
375c2b6352 dm: resize the vm_config buffer in 'vm_get_config()'
resize vm_config buffer from 16KB to 32KB, as 16KB
 is not enough on EHL platform, which will result in
 crash when accessing this memory.

Tracked-On: #5649
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2021-02-07 09:14:19 +08:00
Shuang Zheng
0ea991fbed config_tools: add SW SRAM config
add SW SRAM config for hybrid_rt and industry scenarios on tgl-rvp
and ehl-crb-b boards.

Tracked-On: #5649

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2021-02-03 15:41:17 +08:00
Tao Yuhong
50d8525618 HV: deny HV owned PCI bar access from SOS
This patch denies Service VM the access permission to device resources
owned by hypervisor.
HV may own these devices: (1) debug uart pci device for debug version
(2) type 1 pci device if have pre-launched VMs.
Current implementation exposes the mmio/pio resource of HV owned devices
to SOS, should remove them from SOS.

Tracked-On: #5615
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2021-02-03 14:01:23 +08:00
Tao Yuhong
6e7ce4a73f HV: deny pre-launched VM ptdev bar access from SOS
This patch denies Service VM the access permission to device
resources owned by pre-launched VMs.
Rationale:
 * Pre-launched VMs in ACRN are independent of service VM,
   and should be immune to attacks from service VM. However,
   current implementation exposes the bar resource of passthru
   devices to service VM for some reason. This makes it possible
   for service VM to crash or attack pre-launched VMs.
 * It is same for hypervisor owned devices.

NOTE:
 * The MMIO spaces pre-allocated to VFs are still presented to
  Service VM. The SR-IOV capable devices assigned to pre-launched
  VMs doesn't have the SR-IOV capability. So the MMIO address spaces
  pre-allocated by BIOS for VFs are not decoded by hardware and
  couldn't be enabled by guest. SOS may live with seeing the address
  space or not. We will revisit later.

Tracked-On: #5615
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-02-03 14:01:23 +08:00
Tao Yuhong
bc40e455aa vm_config: pre-launched VM must have higher severity than SOS
If pre-launched VM co-exist with SOS, it must has higher severity
than SOS.

Tracked-On: #5615
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2021-02-03 14:01:23 +08:00
Shuo A Liu
d4aaf99d86 hv: keylocker: Support keylocker backup MSRs for Guest VM
The logical processor scoped IWKey can be copied to or from a
platform-scope storage copy called IWKeyBackup. Copying IWKey to
IWKeyBackup is called ‘backing up IWKey’ and copying from IWKeyBackup to
IWKey is called ‘restoring IWKey’.

IWKeyBackup and the path between it and IWKey are protected against
software and simple hardware attacks. This means that IWKeyBackup can be
used to distribute an IWKey within the logical processors in a platform
in a protected manner.

Linux keylocker implementation uses this feature, so they are
introduced by this patch.

Tracked-On: #5695
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-02-03 13:54:45 +08:00
Shuo A Liu
38cd5b481d hv: keylocker: host keylocker iwkey context switch
Different vCPU may have different IWKeys. Hypervisor need do the iwkey
context switch.

This patch introduce a load_iwkey() function to do that. Switches the
host iwkey when the switch_in vCPU satisfies:
  1) keylocker feature enabled
  2) Different from the current loaded one.

Two opportunities to do the load_iwkey():
  1) Guest enables CR4.KL bit.
  2) vCPU thread context switch.

load_iwkey() costs ~600 cycles when do the load IWKey action.

Tracked-On: #5695
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-02-03 13:54:45 +08:00
Shuo A Liu
c11c07e0fe hv: keylocker: Support Key Locker feature for guest VM
KeyLocker is a new security feature available in new Intel CPUs that
protects data-encryption keys for the Advanced Encryption Standard (AES)
algorithm. These keys are more valuable than what they guard. If stolen
once, the key can be repeatedly used even on another system and even
after vulnerability closed.

It also introduces a CPU-internal wrapping key (IWKey), which is a key-
encryption key to wrap AES keys into handles. While the IWKey is
inaccessible to software, randomizing the value during the boot-time
helps its value unpredictable.

Keylocker usage:
 - New “ENCODEKEY” instructions take original key input and returns HANDLE
   crypted by an internal wrap key (IWKey, init by “LOADIWKEY” instruction)
 - Software can then delete the original key from memory
 - Early in boot/software, less likely to have vulnerability that allows
   stealing original key
 - Later encrypt/decrypt can use the HANDLE through new AES KeyLocker
   instructions
 - Note:
      * Software can use original key without knowing it (use HANDLE)
      * HANDLE cannot be used on other systems or after warm/cold reset
      * IWKey cannot be read from CPU after it's loaded (this is the
        nature of this feature) and only 1 copy of IWKey inside CPU.

The virtualization implementation of Key Locker on ACRN is:
 - Each vCPU has a 'struct iwkey' to store its IWKey in struct
   acrn_vcpu_arch.
 - At initilization, every vCPU is created with a random IWKey.
 - Hypervisor traps the execution of LOADIWKEY (by 'LOADIWKEY exiting'
   VM-exectuion control) of vCPU to capture and save the IWKey if guest
   set a new IWKey. Don't support randomization (emulate CPUID to
   disable) of the LOADIWKEY as hypervisor cannot capture and save the
   random IWKey. From keylocker spec:
   "Note that a VMM may wish to enumerate no support for HW random IWKeys
   to the guest (i.e. enumerate CPUID.19H:ECX[1] as 0) as such IWKeys
   cannot be easily context switched. A guest ENCODEKEY will return the
   type of IWKey used (IWKey.KeySource) and thus will notice if a VMM
   virtualized a HW random IWKey with a SW specified IWKey."
 - In context_switch_in() of each vCPU, hypervisor loads that vCPU's
   IWKey into pCPU by LOADIWKEY instruction.
 - There is an assumption that ACRN hypervisor will never use the
   KeyLocker feature itself.

This patch implements the vCPU's IWKey management and the next patch
implements host context save/restore IWKey logic.

Tracked-On: #5695
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-02-03 13:54:45 +08:00
Shuo A Liu
4483e93bd1 hv: keylocker: Enable the tertiary VM-execution controls
In order for a VMM to capture the IWKey values of guests, processors
that support Key Locker also support a new "LOADIWKEY exiting"
VM-execution control in bit 0 of the tertiary processor-based
VM-execution controls.

This patch enables the tertiary VM-execution controls.

Tracked-On: #5695
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-02-03 13:54:45 +08:00
Shuo A Liu
e9247dbca0 hv: keylocker: Simulate CPUID of keylocker caps for guest VM
KeyLocker is a new security feature available in new Intel CPUs that
protects data-encryption keys for the Advanced Encryption Standard (AES)
algorithm.

This patch emulates Keylocker CPUID leaf 19H to support Keylocker
feature for guest VM.

To make the hypervisor being able to manage the IWKey correctly, this
patch doesn't expose hardware random IWKey capability
(CPUID.0x19.ECX[1]) to guest VM.

Tracked-On: #5695
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
2021-02-03 13:54:45 +08:00
Shuo A Liu
15c967ad34 hv: keylocker: Add CR4 bit CR4_KL as CR4_TRAP_AND_PASSTHRU_BITS
Bit19 (CR4_KL) of CR4 is CPU KeyLocker feature enable bit. Hypervisor
traps the bit's writing to track the keylocker feature on/off of guest.
While the bit is set by guest,
 - set cr4_kl_enabled to indicate the vcpu's keylocker feature enabled status
 - load vcpu's IWKey in host (will add in later patch)
While the bit is clear by guest,
 - clear cr4_kl_enabled

This patch trap and passthru the CR4_KL bit to guest for operation.

Tracked-On: #5695
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2021-02-03 13:54:45 +08:00
Yang,Yu-chu
0c7d8dd8cc config-tools: check vmsix enablement for ehl-crb-b
Assign extra vbar for vmsix devive for ehl-crb-b only.

Tracked-On: #5693
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
2021-02-03 13:53:18 +08:00
Shuang Zheng
1a0ab78a84 config_tools: update config app when creating new scenarios according to folder reorg
update scenaro xml templates when creating or loading new scenarios
according to config app folder reorg.
set default values for new create VMs from scenario schema when creating
a new scenario setting, adding a new VM, loading new default scenarios
for a new board;
add MBA_DELAY in generic scenario xml.

Tracked-On: #5672

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Mao, Junjie <junjie.mao@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
2021-02-03 09:18:23 +08:00
Shuang Zheng
bf88e24218 config_tools: scenario setting UI with xsd schema config
render scenario setting UI with xsd schema config, validate scenario
setting with xsd validation.

Tracked-On: #5672

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Mao, Junjie <junjie.mao@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
2021-02-03 09:18:23 +08:00
Li Fei1
94a980c923 hv: hypercall: prevent sos can touch hv/pre-launched VM resource
Current implementation, SOS may allocate the memory region belonging to
hypervisor/pre-launched VM to a post-launched VM. Because it only verifies
the start address rather than the entire memory region.

This patch verifies the validity of the entire memory region before
allocating to a post-launched VM so that the specified memory can only
be allocated to a post-launched VM if the entire memory region is mapped
in SOS’s EPT.

Tracked-On: #5555
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Reviewed-by: Yonghua Huang  <yonghua.huang@intel.com>
2021-02-02 16:55:40 +08:00
Xie, nanlin
0b6840d1be acrn-config: Update generated configuration source code
1.Reorg generated configuration source code structure
2.Upstream generated configuration source code based on generic board infomation
3.Update license date from 2020 to 2021

Tracked-On: #5644
Signed-off-by: Xie, nanlin <nanlin.xie@intel.com>
2021-02-02 16:53:56 +08:00
Yang,Yu-chu
1f8d245ed8 config-tools: validate the scenario against schema
Try validate the scenario xml against schema if the config.xsd exsists.

Fix the regular expression pattern of IVSHMEM_REGION string validation.

Tracked-On: #5672
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
2021-02-02 15:34:26 +08:00
Junjie Mao
c5ac66e2f5 config_tools/data: fix typos in scenario XML files
Validation of the scenario XML files against the defined schema reveals
three typos. This patch fixes these errors.

Tracked-On: #5644
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-02-01 16:51:09 +08:00
Junjie Mao
99f8ea64c1 config_tools/data: remove descriptions from scenario XML files
With a schema for scenario XML files, we no longer need to duplicate the
description, configurability and writeablity attributes in each XML
file.

This patch applies the following transformation to all scenario XML files
in order to remove these attributes.

<xsl:stylesheet
    version="1.0"
    xmlns:xsl="http://www.w3.org/1999/XSL/Transform">

  <xsl:template match="@desc" />
  <xsl:template match="@configurable | @multiselect | @readonly" />

  <!-- The identity template -->
  <xsl:template match="@*|node()">
    <xsl:copy>
      <xsl:apply-templates select="@*|node()"/>
    </xsl:copy>
  </xsl:template>

</xsl:stylesheet>

Tracked-On: #5644
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
2021-02-01 16:51:09 +08:00