Commit Graph

4834 Commits

Author SHA1 Message Date
Deb Taylor
7d4b2c824f Edits to Ubuntu SOS; changed SOS/UOS to Service VM/User VM
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-02-11 16:47:55 -05:00
Zide Chen
f3249e77bd hv: enable early pr_xxx() logs
Currently panic() and pr_xxx() statements before init_primary_pcpu_post()
won't be printed, which is inconvenient and misleading for debugging.

This patch makes pr_xxx() APIs working before init_pcpu_pre():

- clear .bss in init.c, which makes sense to clear .bss at the very beginning
  of initialization code. Also this makes it possible to call init_logmsg()
  before init_pcpu_pre().

- move parse_hv_cmdline() and uart16550_init(true) to init.c.

- refine ticks_to_us() to handle the case that it's called before
  calibrate_tsc(). As a side effect, it prints "0us" in early pr_xxx() calls.

- call init_debug_pre() in init_primary_pcpu() and after this point,
  both printf() and pr_xxx() APIs are available.

However, this patch doesn't address the issue that pr_xxx() could be called
on PCPUs that set_current_pcpu_id() hasn't been called, which implies that
the PCPU ID shown in early logs may not be accurate.

Tracked-On: #2987
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-02-11 08:53:56 +08:00
Geoffroy Van Cutsem
db6fe1e347 doc: update Grub configuration instructions for Ubuntu (Service VM)
Update the "Using Ubuntu as the Service OS" tutorial to tweak the instructions
pertaining to the Grub bootloader configuration. Specifically, update to reflect
the content of '/etc/default/grub' in Ubuntu 18.04 and also make loading the
Service OS kernel the default.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2020-02-10 09:46:00 -05:00
Alexander Merritt
920f02706a acrn: rename param in uart16550_init
Tracked-On: #4390
Signed-off-by: Alexander Merritt <alex.merritt@intel.com>
2020-02-10 11:49:34 +08:00
Alexander Merritt
2e10930d12 Python scripts discovering CPU IDs are off by 1
Tracked-On: #4387
Signed-off-by: Alexander Merritt <alex.merritt@intel.com>
2020-02-10 11:47:53 +08:00
Alexander Merritt
ef1c92e841 fix typos in script
Tracked-On: #4388
Signed-off-by: Alexander Merritt <alex.merritt@intel.com>
2020-02-10 11:47:26 +08:00
Deb Taylor
8896ba25b5 Grammatical edits to Run Kata Containers doc
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-01-28 10:18:09 -05:00
Geoffroy Van Cutsem
88dfd8d447 doc: update Kata and ACRN tutorial
Update the Kata and ACRN tutorial based on the latest SW components. Many
previous steps are no longer required and have been removed.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2020-01-28 09:08:37 -05:00
Deb Taylor
e1eedc9946 Doc: Style updates to Building from Source doc
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-01-23 19:23:29 -05:00
Geoffroy Van Cutsem
1f6c0cd439 doc: update project's target max LOC
Project ACRN is targetting to keep the hypervisor's total number of lines of
code (LOC) below 40K. Update the "Build ACRN from Source" document to accurately
reflect that.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2020-01-22 16:56:30 -05:00
Deb Taylor
8f9e4c2ddd Updated grammer in ACRN industry scenario doc
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-01-21 12:40:04 -05:00
Xie, nanlin
54e9b562b4 doc: Modify CL version from 32030 to 31670
Signed-off-by: Xie, nanlin <nanlin.xie@intel.com>
2020-01-21 09:45:20 +08:00
Junming Liu
1b3754aaee dm:passthrough opregion to uos gpu
uos IGD driver need opregion when enable GVT-d.

This patch pass-thru opregion to uos gpu.
Here is the steps:
(1) set opregion gpa(guest physical addrress) 0xDFFFD000;
(2) get opregion hpa(host physical addrress);
(3) build EPT mapping for opregion.

v1 -> v2:
        * initialize the EPT mapping for passthrough GPU opregion region
        in passthru_init instead of reading the ASLS config space

v2 -> v3:
        * add EPT unmap when deinit
        * change some micro name

Tracked-On: #4360

Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Wu Binbin <binbin.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2020-01-17 09:23:13 +08:00
Junming Liu
4d882731ce dm:passthrough graphics stolen memory to uos gpu
gop driver and uos IGD driver will use
graphics stolen memory(gsm) when enable GVT-d.

This patch pass-thru gsm to uos gpu.

After set physical GPU gsm size 64MB in host BIOS:
Here is the steps:
(1) set gsm gpa(guest physical addrress) 0xDB000000;
(2) get gsm hpa(host physical addrress);
(3) build EPT mapping for gsm.

v1 -> v2:
        * initialize the EPT mapping for passthrough GPU gsm region
        in passthru_init instead of reading the BDSM config space

v2 -> v3:
        * add EPT unmap when deinit
	* change some micro name

Tracked-On: #4360

Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Wu Binbin <binbin.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2020-01-17 09:23:13 +08:00
Junming Liu
f9f64d356f dm:reserve 64M hole for graphics stolen memory in e820 table
Add 64M@0xDB000000 for GVT-d usage as below.
Currently, use 64M for graphics stolen memory,
gop driver and uos IGD driver will use this memory region.

start 	      end          size     Note
[0x 00000000, 0x 000A0000] 640K
[0x 000A0000, 0x 00100000] 384K
[0x 00100000, 0x 7ff00000] 2G-1M    lowmem-1M
[0x 80000000, 0x 88000000] 128M     [lowmem, +128M]
[0x DB000000, 0x DF000000] 64MB     graphics stolen memory for GVT-d
[0x DF000000, 0x E0000000] 16M 	    gvt
[0x e0000000, 0x100000000] 512M
[0x100000000, 0x140000000] 1G

Tracked-On: #4360

Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Liu XinYun <xinyun.liu@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Reviewed-by: Wu Binbin <binbin.wu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2020-01-17 09:23:13 +08:00
Minggui Cao
10c407cc85 HV: init local variable before it is used.
it is better to init bdfs_from_drhds.pci_bdf_map_count
before it is passed to other function to do:
    bdfs_from_drhds->pci_bdf_map_count++

Tracked-On: #3875
Signed-off-by: Minggui Cao <minggui.cao@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2020-01-17 09:21:09 +08:00
Zide Chen
086e0f19d8 hv: fix pcpu_id mask issue in smp_call_function()
INVALID_BIT_INDEX has 16 bits only, which removes all pcpu_id that
is >= 16 from the destination mask.

Tracked-On: #4354
Signed-off-by: Zide Chen <zide.chen@intel.com>
2020-01-17 09:20:53 +08:00
Shuang Zheng
a631c94c10 doc: reset clear linux version and ootb command in getting start guide
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-01-16 14:04:54 +08:00
Geoffroy Van Cutsem
dbf9b9334d doc: update the "Using SDC Mode on the NUC" tutorial
Update the "Using SDC Mode on the NUC" tutorial to use ACRN v1.5. The Clear
Linux used in this update is 32080 which is also the first release that includes
a Service VM (linux-iot-lts2018-sos) kernel that supports MACVLAN and MACVTAP,
both of which are need to run Kata Containers on ACRN.

Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2020-01-14 10:56:00 -05:00
Deb Taylor
809338a36b Doc: Clarify Post-Launch VM data flow discussion for vuart conf
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-01-14 10:55:02 -05:00
Yonghua Huang
fd4775d044 hv: rename VECTOR_XXX and XXX_IRQ Macros
1. Align the coding style for these MACROs
  2. Align the values of fixed VECTORs

Tracked-On: #4348
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-01-14 10:21:23 +08:00
Yonghua Huang
b90862921e hv: rename the ACRN_DBG_XXX
Refine this MACRO 'ACRN_DBG_XXX' to 'DBG_LEVEL_XXX'

Tracked-On: #4348
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-01-14 10:21:23 +08:00
Junming Liu
03f5c639a0 dm:derive the prefetch property of PCI bar for pass-through device
Now the PCI bar uses the hardcoded prefetch property
for the pass-through device.
This doesn't work when trying to load windows GPU driver
for the pass-through GPU device.

For pass-through devices,
set the bar prefetchable property the same as physical bar.

Tracked-On: #4282

Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2020-01-13 16:47:25 +08:00
Junming Liu
ceb197c993 dm:keep pci bar property unchanged when updating pci bar address
When update pci bar addr,
DM may change the bar property by func pci_cfgrw.
PCI spec chapter 'Base Addresses' shows
bits 0~3 are readonly of memeory space BAR,
so this change won't happen.

This patch ensures pci bar property unchanged
when update pci bar addr.

Tracked-On: #4282

Signed-off-by: Junming Liu <junming.liu@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Yu Wang <yu1.wang@intel.com>
2020-01-13 16:47:25 +08:00
Shuo A Liu
b59e5a870a hv: Disable HLT and PAUSE-loop exiting emulation in lapic passthrough
In lapic passthrough mode, it should passthrough HLT/PAUSE execution
too. This patch disable their emulation when switch to lapic passthrough mode.

Tracked-On: #4329
Tested-by: Dongsheng Zhang <dongsheng.x.zhang@intel.com>
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-01-13 10:16:30 +08:00
Shuo A Liu
3edde2608c hv: debug: show vcpu thread status in vcpu_list debug command
Due to vcpu and its thread are two different perspective modules, each
of them has its own status. Dump both states for better understanding
of system status.

Tracked-On: #4329
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-01-13 10:16:30 +08:00
Shuo A Liu
db708fc3e8 hv: rename is_completion_polling to is_polling_ioreq
is_polling_ioreq is more straightforward. Rename it.

Tracked-On: #4329
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-01-13 10:16:30 +08:00
Jack Ren
e4f5c1ef48 version: 1.6-unstable
Signed-off-by: Jack Ren <jack.ren@intel.com>
2020-01-10 19:36:50 +08:00
Deb Taylor
008c35a88f Doc: Updated one paragraph in re_industry doc.
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-01-09 14:43:46 -05:00
Deb Taylor
7cef407da0 Doc: Fixed spelling error in the acrn_config_tool file.
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-01-09 13:19:53 -05:00
Deb Taylor
02ce44ce52 Doc: Style and grammar edits to GSG for ACRN Industry Scenario.
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-01-09 11:51:40 -05:00
Deb Taylor
e8512bf766 Doc: Grammar updates to ACRN Config Tool doc.
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-01-09 10:39:19 -05:00
Victor Sun
545117731a doc: update some xml elements description
Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-01-09 07:43:41 -05:00
Shuang Zheng
9e244b1bb2 doc: update getting start guide about clear linux version and ootb commands
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
2020-01-09 07:29:19 -05:00
fangfang.shen
5f1fa3cf1b doc: change version info
Signed-off-by: fangfang.shen <fangfang.shen@intel.com>
2020-01-09 07:07:13 -05:00
Yonghua Huang
82b89fd04c hv: check the validity of 'pdev' in 'set_ptdev_intr_info'
This patch checks the validity of 'vdev->pdev' to
 ensure physical device is linked to 'vdev'.
 this check is to avoid some potential hypervisor
 crash when destroying VM with crafted input.

Tracked-On: #4336
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2020-01-09 16:04:47 +08:00
fuzhongl
fe03d8700d Doc: releasenotes_1.5 update
adding this information to releasenotes:
Update to use ACRNGT GOP to install Windows

Signed-off-by: fuzhongl <fuzhong.liu@intel.com>
2020-01-08 20:33:53 -05:00
Deb Taylor
e91ecaa7e0 Doc: Grammar update to arcn_ootd.rst.
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-01-08 20:30:41 -05:00
fuzhongl
88644ab708 Doc: document update base on release_v1.5
Signed-off-by: fuzhongl <fuzhong.liu@intel.com>
2020-01-08 18:39:23 -05:00
Mingqiang Chi
5267a9775c dm:replace perror with pr_err
use acrn-dm logger function instread of perror,
this helps the stability testing log capture.

Tracked-On: #4098
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2020-01-08 13:37:57 +08:00
Yonghua Huang
0e47f0a8f9 hv: fix potential NULL pointer reference in hc_assgin_ptdev
this patch validates input 'vdev->pdev' before
 reference to avoid potenial hypervisor crash.

[v2] update:
 Combine condition check for 'vdev' and 'vdev->pdev'

Tracked-On: #4334
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2020-01-08 11:54:49 +08:00
Yonghua Huang
ddebefb9b4 hv: remove depreciated code for hc_assign/deassign_ptdev
'param' is BDF value instead of GPA when VHM driver
  issues below 2 hypercalls:
   - HC_ASSIGN_PTEDEV
   - HC_DEASSIGN_PTDEV
 This patch is to remove related code in hc_assign/deassign()
 functions.

Tracked-On: #4334
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
2020-01-08 11:54:49 +08:00
Deb Taylor
96aba9bd45 Doc: Grammatical edits to RN 1.5.
Signed-off-by: Deb Taylor <deb.taylor@intel.com>
2020-01-07 22:12:38 -05:00
fuzhongl
9b454dc406 Doc: releasenotes_1.5
Signed-off-by: fuzhongl <fuzhong.liu@intel.com>
2020-01-07 20:36:21 -05:00
Li Fei1
65ed6c3529 hv: vpci: trap PCIe ECAM access for SOS
SOS will use PCIe ECAM access PCIe external configuration space. HV should trap this
access for security(Now pre-launched VM doesn't want to support PCI ECAM; post-launched
VM trap PCIe ECAM access in DM).
Besides, update PCIe MMCONFIG region to be owned by hypervisor and expose and pass through
platform hide PCI devices by BIOS to SOS.

Tracked-On: #3475
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-01-07 16:05:30 +08:00
Li Fei1
1e50ec8899 hv: pci: use ECAM to access PCIe Configuration Space
Use Enhanced Configuration Access Mechanism (MMIO) instead of PCI-compatible
Configuration Mechanism (IO port) to access  PCIe Configuration Space
PCI-compatible Configuration Mechanism (IO port) access is used for UART in
debug version.

Tracked-On: #3475
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-01-07 16:05:30 +08:00
Wei Liu
57a362061f acrn-config: set up whitelist for board containing hide pci device
Currently, config tool will maintain a whitelist for the board which
need to hide some pci devices. For the board out of whitelist, we set
MAX_HIDE_PDEVS_NUM to 0.

Tracked-On: #3475
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-01-07 16:05:30 +08:00
Li Fei1
65f3751ea3 hv: pci: add hide pci devices configuration for apl-up2
Other Platforms are not added for now.

Tracked-On: #3465
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-01-07 16:05:30 +08:00
Shuo A Liu
3239cb0e1c hv: Use HLT as the default idle action of service OS
This patch overwrites the idle driver of service OS for industry, sdc,
sdc2 scenarios. HLT will be used as the default idle action.

Tracked-On: #4329
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-01-07 11:23:32 +08:00
Shuo A Liu
4303ccb1a0 hv: HLT emulation in hypervisor
HLT emulation is import to CPU resource maximum utilization. vcpu
doing HLT means it is idle and can give up CPU proactively. Thus, we
pause the vcpu thread in HLT emulation and resume it while event happens.

When vcpu enter HLT, its vcpu thread will sleep, but the vcpu state is
still 'Running'.

VM ID    PCPU ID    VCPU ID    VCPU ROLE    VCPU STATE
=====    =======    =======    =========    ==========
  0         0          0       PRIMARY      Running
  0         1          1       SECONDARY    Running

Tracked-On: #4329
Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-01-07 11:23:32 +08:00