2 Commits

Author	SHA1	Message	Date
Zide Chen	c9982e8c7e	hv: nested: setup emulated VMX MSRs ... We emulated these MSRs: - MSR_IA32_VMX_PINBASED_CTLS - MSR_IA32_VMX_PROCBASED_CTLS - MSR_IA32_VMX_PROCBASED_CTLS2 - MSR_IA32_VMX_EXIT_CTLS - MSR_IA32_VMX_ENTRY_CTLS - MSR_IA32_VMX_BASIC: emulate VMCS revision ID, etc. - MSR_IA32_VMX_MISC For the following MSRs, we pass through the physical value to L1 guests: - MSR_IA32_VMX_EPT_VPID_CAP - MSR_IA32_VMX_VMCS_ENUM - MSR_IA32_VMX_CR0_FIXED0 - MSR_IA32_VMX_CR0_FIXED1 - MSR_IA32_VMX_CR4_FIXED0 - MSR_IA32_VMX_CR4_FIXED1 Tracked-On: #5923 Signed-off-by: Zide Chen <zide.chen@intel.com> Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>	2021-05-16 19:05:21 +08:00
Zide Chen	4930992118	hv: nested: implement the framework for VMX MSR emulation ... Define LIST_OF_VMX_MSRS which includes a list of MSRs that are visible to L1 guests if nested virtualization is enabled. - If CONFIG_NVMX_ENABLED is set, these MSRs are included in emulated_guest_msrs[]. - otherwise, they are included in unsupported_msrs[]. In this way we can take advantage of the existing infrastructure to emulate these MSRs. Tracked-On: #5923 Spick igned-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>	2021-05-16 19:05:21 +08:00