When CPUID executes with EAX set to 02H, the processor returns information about cache and TLB information.
This information is percpu related, and should be obtained directly from the physical cpu.
BTW, this patch is backported from v2.7 branch.
Tracked-On: #6931
Signed-off-by: Tw <wei.tan@intel.com>
Reviewed-by: Fei Li <fei1.li@intel.com>
This patch is to eliminate a code scan warning.
p_elf_header32 was given a value when it was declared, but later it was
given the same value again. Just remove the later one.
Tracked-On: #7318
Signed-off-by: Zhou, Wu <wu.zhou@intel.com>
Because Board Inspector modifies the SR-IOV function,
VF information is correctly captured when Board Inspector
collects Board information. So update the board xmls
Tracked-On: #7031
Signed-off-by: zhongzhenx.liu <zhongzhenx.liu@intel.com>
Now all the 3D ops are handled in one dedicated thread. As 3D ops are
not safe in multi-thread env, some checks are added so that it can indicate
that it is not in the expected code path.
Tracked-On: #7296
Acked-by: Wang Yu1 <yu1.wang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Otherwise the memory related with vga_context is leaked.
v1->v2: Use the pthread_join instead of usleep to wait for
the termination of vga_thread.
Tracked-On: #7296
Acked-by: Wang Yu1 <yu1.wang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
This is not needed as it is reconfigured in course of vga_thread_loop.
At the same time it is not thread-safe as the 3D api is involved
in vdpy_surface_set.
v2->v3: move the initialization of vga_surface width/height into
vga_thread.
Tracked-On: #7296
Acked-by: Wang Yu1 <yu1.wang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
In order to support the VGA op, one vga_thread is created. But
in course of virtio_gpu_reset, it will also create one vga_thread.
This is incorrect.
v1->v2: the thread_id of vga_thread is treated as read-only after
the thread is created.
One thread_status based on atomic type indicates the life_cycle
of vga_thread.
v2->v3: Add the vga_thread_mtx in course of changing life_cycle of vga_thread
Tracked-On: #7296
Acked-by: Wang Yu1 <yu1.wang@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Now interrupt vector in ACRN hypervisor is maintained as global variable, not
per-CPU variable. If there're more PCI devices, the physical interrupt vectors
are not enough most likely.
This patch would not allocate physical interrupt vector for MSI/MSI-X vectors
if interrupt posting could been used to inject the MSI/MSI-X interrupt to
a VM directly.
Tracked-On: #7275
Signed-off-by: Fei Li <fei1.li@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Bugfix:bootargs is optional parameter, which may be not
present in xml as a node, asl_gen.py needs to process
that case.
Tracked-On: #7307
Signed-off-by: hangliu1 <hang1.liu@linux.intel.com>
The read-the-docs theme uses a reduced font size within tables. The CSS
used though is overly restrictive and doesn't properly handle tables
containing lists or other constructs where the paragraph tags don't have
the <td> tag within the table as the immediate parent. Add an
overriding style in our custom CSS to fix this so the font size on lists
within a table are the same as normal paragraphs within a table.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Using the SSRAM area size extracted by config_tools, the patch changes
the hard-coded GPA SSRAM area size to its actual size, so that
pre-launched VMs can support large(>8MB) SSRAM area.
When booting service VM, the SSRAM area has to be removed from Service
VM's mem space, because they are passed-through to the pre-rt VM. The
code was bugged since it was using the SSRAM area's GPA in the pre-rt
VM. Changed it to GPA in Service VM.
Tracked-On: #7212
Acked-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Zhou, Wu <wu.zhou@intel.com>
The GPA SSRAM area size in pre-launched VMs was hard-coded to 8MB.
Since this area is mapped from host SSRAM area, it will cause compile
problem when host's SSRAM area is larger than 8MB.
To solve this issue, we have to calculate SSRAM area's size in
gpa.py, and generate a macro PRE_RTVM_SW_SRAM_MAX_SIZE for HV
to use.
PRE_RTVM_SW_SRAM_START_GPA/END_GPA can be calculated by end/size
in HV, so they are removed.
When SSRAM is not configured in the system, PRE_RTVM_SW_SRAM_MAX_SIZE
is set to 0.
Crl_bin is not needed in guest. So it's size is removed in bin_gen.py.
Tracked-On: #7212
Signed-off-by: Zhou, Wu <wu.zhou@intel.com>
On hybrid platform(e.g. ADL), there may be multiple instances of same level caches for different type of processors,
The current design only supports one global `rdt_info` for each RDT resource type.
In order to support hybrid platform, this patch introduce `rdt_ins` to represents the "instance".
Also, the number of `rdt_info` is dynamically generated by config-tool to match with physical board.
Tracked-On: projectacrn#6690
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
As RDT related information will be offered by config-tool dynamically,
and HV is just a consumer of that. So there's no need to do this detection
at startup anymore.
Tracked-On: projectacrn#6690
Signed-off-by: Tw <wei.tan@intel.com>
Acked-by: Eddie Dong <eddie.dong@Intel.com>
This patch adds logic to the extractors to fetch the following information.
1. All the details of an SR-IOV capability, which are reported in the
SR-IOV extended capability structure.
2. Correctly report the vendor ID, device ID and BAR addresses of VFs.
3. Refer each VF back to the corresponding PF. Use XPATH to search for
all the VFs enabled by a PF.
Tracked-On: #7301
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
This patch adds the logic needed to fully parse an SR-IOV extended
capability structure. Such information will later be used to extract all
information about physical and virtual functions.
Tracked-On: #7301
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In order to ease the access of certain capability structure of a PCI config
space, this patch changes the class PCIConfigSpace to maintain a
_caps_as_dict dictionary that maps capability names (as specified in the
caps.py and extcaps.py) to the actual capability structures.
Tracked-On: #7301
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The guest memory is allocated through hugetlb. Huge page fault is
triggered by writing a byte to the starting address for each huge page.
In hugetlb_fault(), The physical pages are allocated and *clear*.
So no need to erasing the memory again after hugetlb setup. This will
bring about 130ms (changes with platform) latency for each 1G memory.
Notice: this means we depends on kernel to erase the memory in huge page
fault!
Tracked-On: #7298
Signed-off-by: Conghui <conghui.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
We have redesigned Virtio devices, so this patch updates
the upgrader.py script for them.
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
1. for virtio console, reference to the document
https://projectacrn.github.io/latest/developer-guides/hld/virtio-console.html,
the generated launch script will look like this:
`virtio-console,[@]stdio|tty|pty|file:portname[=portpath]\
[,[@]stdio|tty|pty|file:portname[=portpath][:socket_type]]`
*receding with @ marks the port as a console port,
otherwise it is a normal virtio-serial port
*The portpath can be omitted when backend is stdio or pty.
2. for virtio input, the generated launch script as below.
`<name>:<phys>,id=<anyString>`
The launch script will automatically find the specific /dev/input/eventX
according to the event name and phys got from board.xml.
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
We have redesigned Virtio and UI for user, so this patch updates the schema
for the new design.
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
default value of minOccurs is "1", which will trigger problem
when user leave pcpu_id blank while preserve cpu_affinity in
service VM.
Tracked-On: #7267
Signed-off-by: hangliu1 <hang1.liu@linux.intel.com>
Service vm could have the combination of big and
little core cpu_affinity setting, fix the assert.
Tracked-On: #7270
Signed-off-by: hangliu1 <hang1.liu@linux.intel.com>
Add license information to virtio_gpu.c
Fix some grammar issues.
Tracked-On: #7241
Signed-off-by: Sun Peng <peng.p.sun@linux.intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>
1. enlarge receive Service VM message time to 10s. Now in some extreme
environments, Service VM will takes more than 1s to ACK the User VM's
requirements.
2. fix a bug to calculate string pointer size.
Tracked-On: #7215
Signed-off-by: Fei Li <fei1.li@intel.com>
Many of the license and Intel copyright headers include the "All rights
reserved" string. It is not relevant in the context of the BSD-3-Clause
license that the code is released under. This patch removes those strings
throughout the code (hypervisor, devicemodel and misc).
Tracked-On: #7254
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
fix the path issue that fail to read XSD file.
Tracked-On: #6689
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Update the last_updated extension to correctly handle when new docs are
added and aren't yet commited into git vs. when the list of git folders
isn't correct. Previous PR #7251 incorrectly handled these as the same.
Tracked-On: #7249
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
