Update documentaiton in the release_2.2 branch with changes made after
tagged for code freeze
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
P2SB_BAR_ADDR related macros should only be defined in misc_cfg.h only when
p2sb is enabled in scenario xml.
Tracked-On: #5340
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
add the TSN device in tgl-rvp board XML and configure it to
passthrough to pre-launched VM for hybrid_rt scenario on tgl-rvp.
Tracked-On: #5266
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
update config xmls to make ivshmem size in decimal MB at description
and values.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
make ivshmem size configured in decimal and MB in config tool
UI and XMLs to simplify input from users.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
When generate the launch scripts, the pm_by_vuart setting of pm_notify_channel
in launch setting should be according to the config of SOS vuart1.
Tracked-On: #5154
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Move the function which are used to get available ttysn
from board catalogue to library catalogue
Tracked-On: #5154
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
move MACRO of IVSHMEM region name to ivshmem_cfg.h and bug fix that
avoids multiple declarations of mem_regions in ivshmem_cfg.h
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
The MACRO of IVSHMEM shared region name is relevant to scenario, move
the MACRO from pci_devices.h which should be consistent for different
scenarios to ivshmem_cfg.h which is the configuration for IVSHMEM and
could vary in sceanrios.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
so that vm_configurations.h/vm_configurations.c are consistent for
same scenario
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Comments will be added for the HV_SUPPORTED_MAX_CLOS/MAX_MBA_CLOS_NUM_ENTRIES/MAX_CACHE_CLOS_NUM_ENTRIES
macros in generated code
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Move struct pt_intx_config vm0_pt_intx[] defintion to pt_intx.c
so that vm_configurations.h/vm_configurations.c are consistent for different boards
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
so that vm_configurations.h/vm_configurations.c are consistent for different boards
The boilerplate code is protected by #ifdef P2SB_BAR_ADDR/#endif, so it will
not hurt if we always produce related code.
Define new macros P2SB_BAR_ADDR_GPA and P2SB_BAR_SIZE to make the code more flexible.
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
so that vm_configurations.h/vm_configurations.c are consistent for different boards
The boilerplate code is protected by #ifdef VM0_PASSTHROUGH_TPM/#endif, so it will
not hurt if we always produce related code.
Define a new macro VM0_TPM_BUFFER_BASE_ADDR_GPA to define the allocated gpa for VM0_TPM_BUFFER_BASE_ADDR
to make the code more flexible.
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
so that vm_configurations.h/vm_configurations.c are consistent for different boards
The boilerplate code is protected by #ifdef CONFIG_RDT_ENABLED/#endif, so it will
not hurt if we always produce the .clos code.
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
so that vm_configurations.h/vm_configurations.c are consistent for different boards
Debugged and refactored the split_cmdline() function
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
so that vm_configurations.h/vm_configurations.c are consistent for different boards
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
so that vm_configurations.h/vm_configurations.c are consistent for different boards
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
For python versions prior to 3.7, dict order is not guaranteed.
Use ordered dict to ensure consistent ordering for the same input,
otherwise, the generated config files may change every time the config tool runs
Fix some error messages in code/comment
Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
add extern acrn_vm_pci_dev_config variables in vm_configuration.c
when ivshmem configured on scenarios with ivshmem configured.
Tracked-On: #5298
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Use vm_type to configure the load_type/uuid/severity,
Delete uuid lines in config scenario.
Tracked-On: #4641
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
increase the length of DSDT table to avoid memory overwrited by
subsequent ACPI tables.
Tracked-On: #5266
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add TSN device OTN1 config into offline ACPI table for TSN device
passthrough to pre-launched RTVM.
v2) update TSN device list from bdf list to vid:pid list.
Tracked-On: #5266
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
generate ASL code of ACPI tables for pre-launched VMs on nuc7i7dnb,
whl-ipc-i5, whl-ipc-i7, ehl-crb-b boards
Tracked-On: #5266
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
enable TPM2 config on ehl-crb-b board and update TPM2 configs on
legacy boards.
Tracked-On: #5266
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
For EHL hybrid_rt scenario, the requirement needs a network device
passthough to pre-launched VM0.
Tracked-On: #5286
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add 2 MACROs: DEFAULT_PCI_MMCFG_START_BUS and DEFAULT_PCI_MMCFG_END_BUS
in platform_acpi_info.h.
Tracked-On: #5233
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add 2 MACROs: DEFAULT_PCI_MMCFG_START_BUS and DEFAULT_PCI_MMCFG_END_BUS
in platform_acpi_info.h.
Tracked-On: #5233
Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
use offline tool to generate one binary of ACPI tables for pre-launched
VMs, then load the ACPI binary into guest physical memory as grub module.
Users can configure the resources or devices like TPM2 for the
pre-launched VM from sceanrio XMLs or UI, and the offline tool will
generate ASL code of the ACPI tables with the configured resources or
devices, then compile the ASL code to one binary when building ACRN.
Tracked-On: #5266
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
EHL PSE TSN GbE driver is default set to use 32bit of dma addressing.
net: stmmac: configure PSE Gbe to 32bit dma addressing
https://github.com/intel/linux-intel-lts/commit/011c8f
When VM has more than 4GB physical memory, Linux kernel uses the bounce
buffers (swiotlb) to translate kernel data in 64bit memory to 32bit
range for the sake of the DMA because iommu is not available. The
default swiotlb value 32768 is insufficient to support two PSE TSN GbEs
at the same time. Increase the value to 131072 otherwise two GbEs can't
link up.
Tracked-On: #5243
Signed-off-by: Toshiki Nishioka <toshiki.nishioka@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
When creating a new launch setting, config app can't fine the
scenario config which caused the app failed to load the new
launch setting.
Tracked-On: #5282
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Reviewed-by: Victor Sun <victor.sun@intel.com>
Build and install 'acrnctl' for regardless of the RELEASE value. Kata Containers
depends on 'acrnctl' in order to work correctly and we therefore need to make
sure that it is built and installed correctly regardless of whether this is a
debug or a release build.
Tracked-On: #4940
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Add a new scenario xml file for EHL which is derived from hybrid_rt for
validation of certain passthru devices in prelaunched RTVM. Because the
configuration requires to disable GPIO support for SOS VM, it should
not be merged into the standard hybrid_rt scenario. According to this
change, remove the SCI passthru setting from existing hybrid_rt since
from now on hybrid_rt_fusa should be used for SCI passthru test.
Tracked-On: #5278
Signed-off-by: Toshiki Nishioka <toshiki.nishioka@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
Always use P2SB_ as a prefix for all macro definitions related to P2SB
MMIO passthru. And introduce the new P2SB_VGPIO_DM_ENABLED macro to
indicate the presence of the pre-launched VM which requires the feature.
This macro intends to be used to enclose source files with ifdef where
macros defined by config-tool being used which are available only when
the feature is enabled. It is required to avoid causing compilation
errors when users build HV without enabling the feature.
Tracked-On: #5246
Signed-off-by: Toshiki Nishioka <toshiki.nishioka@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Two PSE-GPIO controllers of EHL CRB require MSI-X emulation for
pass-thru because it uses multiple MSI vectors. Currently acrn-config
enables MSI-X emulation for only TSN devices. Enable MSI-X emulation
for PSE-GPIOs, too.
Tracked-On: #5242
Signed-off-by: Toshiki Nishioka <toshiki.nishioka@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
After below commit in https://github.com/zephyrproject-rtos/zephyr
commit d0126a037d23484feebba00d2c0eac27e6393fef
Author: Zide Chen <zide.chen@intel.com>
Date: Wed Feb 5 08:32:00 2020 -0800
boards/x86/acrn: build it in x86_64 mode and switch to X2APIC
The zephyr image for acrn would be built in x86_64 mode by default, then the
load/entry address for pre-launched Zephyr image should be changed from
0x100000 to 0x8000 accordingly per below definition in zephyr .ld file:
zephyrproject_src/zephyr/include/arch/x86/intel64/linker.ld
SECTIONS
{
/*
* The "locore" must be in the 64K of RAM, so that 16-bit code (with
* segment registers == 0x0000) and 32/64-bit code agree on addresses.
* ... there is no 16-bit code yet, but there will be when we add SMP.
*/
.locore 0x8000 : ALIGN(16)
{
_locore_start = .;
The commit in zephyrproject is merged before zephyr v2.2 release, so from v2.2
on, HV need this fix to boot Zephyr as pre-launched VM.
Tracked-On: #5259
Signed-off-by: Victor Sun <victor.sun@intel.com>
ACRN 2.1 supports two virtual boot modes, deprivilege boot mode and
direct boot mode. The deprivilege boot mode’s main purpose is to support
booting Clear Linux Service VM with UEFI service support, but this
brings scalability problems when porting ACRN to new Intel platforms.
For the 2.2 release, deprivilege mode is removed, and only direct boot
is supported, and with this we've removed support for Clear Linux as the
service VM, which impacts over 50 ACRN documents. This PR removes
documents we don't intend to update, and fixes broken links that would
occur from references to these deleted docs.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Users can add one or more ivshmem shm regions for uos when the shm
regions are configured from scenario setting.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
add shm_region config in default launch XMLs to configure Inter-
VM communication for post-launched VMs.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
This patch is to expose GPIO chassis interrupts as INTx to safety VM for
EHL. User can configure this per-VM attribute in scenario xml using the
following format:
<pt_intx desc="pt intx mapping.">
(phys_gsi0, virt_gsi0), (phys_gsi1, virt_gsi1), (phys_gsiN, virt_gsiN)
</pt_intx>
The physical and virtual interrupt gsi in each pair are separated by a
comma and enclosed in parentheses. If an integer begins with 0x or 0X,
it is hexadecimal, otherwise, it is assumed to be decimal. Example:
<pt_intx desc="pt intx mapping.">
(1, 0), (0x3, 1), (0x4, 2), (5, 6), (89, 0x12)
</pt_intx>
Tracked-On: #5241
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
This patch is to support direct assignment of P2SB bridge to one pre-launched
VM for EHL. User can configure this per-VM attribute in scenario xml:
<mmio_resources desc="MMIO resources.">
<p2sb>y</p2sb>
</mmio_resources>
Set p2sb to y to passthru P2SB bridge to VM, and n otherwise.
Tracked-On: #5221
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Add missing IVSHMEM tag in mrb board xml file to fix build issue
Correct misspelled function name
Use better error messages
Tracked-On: #5221
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Because ivshmem memory uses hv memory, if the ivshmem feature is
enabled, HV_RAM_SIZE will include IVSHMEM_SHM_SIZE.
Tracked-On: #4853
Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
