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https://github.com/projectacrn/acrn-hypervisor.git
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abcfc1c0a0
update vm configurations for hybrid_rt scenario on WHL/EHL/TGL/CFL boards, add 1 YaaG and assign 1 more pcpu for WaaG. Tracked-On: #5390 Signed-off-by: Shuang Zheng <shuang.zheng@intel.com> Acked-by: Victor Sun <victor.sun@intel.com>
37 lines
1.1 KiB
C
37 lines
1.1 KiB
C
/*
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* Copyright (C) 2020 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef VM_CONFIGURATIONS_H
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#define VM_CONFIGURATIONS_H
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#include <misc_cfg.h>
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#include <pci_devices.h>
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/* SOS_VM_NUM can only be 0U or 1U;
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* When SOS_VM_NUM is 0U, MAX_POST_VM_NUM must be 0U too;
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* MAX_POST_VM_NUM must be bigger than CONFIG_MAX_KATA_VM_NUM;
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*/
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#define PRE_VM_NUM 1U
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#define SOS_VM_NUM 1U
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#define MAX_POST_VM_NUM 2U
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#define CONFIG_MAX_KATA_VM_NUM 0U
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/* Bits mask of guest flags that can be programmed by device model. Other bits are set by hypervisor only */
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#define DM_OWNED_GUEST_FLAG_MASK (GUEST_FLAG_SECURE_WORLD_ENABLED | GUEST_FLAG_LAPIC_PASSTHROUGH | \
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GUEST_FLAG_RT | GUEST_FLAG_IO_COMPLETION_POLLING)
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#define VM0_CONFIG_MEM_START_HPA 0x100000000UL
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#define VM0_CONFIG_MEM_SIZE 0x40000000UL
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#define VM0_CONFIG_MEM_START_HPA2 0x0UL
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#define VM0_CONFIG_MEM_SIZE_HPA2 0x0UL
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/* SOS_VM == VM1 */
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#define SOS_VM_BOOTARGS SOS_ROOTFS \
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SOS_CONSOLE \
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SOS_IDLE \
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SOS_BOOTARGS_DIFF
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#endif /* VM_CONFIGURATIONS_H */
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