Jian Jun Chen 29b1ebcd43 dm: add support of high MMIO mapping ... 1G PCI hole is added just after 4G address which is used as the PCI high MMIO address space. Guest high memory is mapped from 5G address for both EPT and device model user space address. Guest e820 table and API vm_map_gpa are updated accordingly. Tracked-On: #2577 Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com> Acked-by: Yu Wang <yu1.wang@intel.com>		2019-02-28 18:33:11 +08:00
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pci	dm: add support of high MMIO mapping	2019-02-28 18:33:11 +08:00
platform	DM: Attestation Keybox support in SOS DM	2019-02-25 16:40:25 +08:00
block_if.c	dm: storage: change DISCARD to synchronous mode	2019-01-23 12:56:47 +08:00
uart_core.c	dm: Add teardown callback for mevent in uart_core	2018-12-27 09:58:20 +08:00
usb_core.c	DM USB: add usb_dev_path_cmp function for convenience	2018-12-14 19:40:44 +08:00