Binbin Wu 241a811f42 hv: ept: apply MCE on page size change mitigation conditionally ... Only apply the software workaround on the models that might be affected by MCE on page size change. For these models that are known immune to the issue, the mitigation is turned off. Atom processors are not afftected by the issue. Also check the CPUID & MSR to check whether the model is immune to the issue: CPU is not vulnerable when both CPUID.(EAX=07H,ECX=0H).EDX[29] and IA32_ARCH_CAPABILITIES[IF_PSCHANGE_MC_NO] are 1. Other cases not listed above, CPU may be vulnerable. Tracked-On: #4121 Signed-off-by: Binbin Wu <binbin.wu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>		2019-11-18 13:40:24 +08:00
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arch/x86	hv: ept: apply MCE on page size change mitigation conditionally	2019-11-18 13:40:24 +08:00
common	hv: sched: add kick_thread to support notification	2019-10-25 13:00:21 +08:00
debug	SEP/SOCWATCH change variable names	2019-09-16 15:54:34 +08:00
dm	hv[v2]: remove registration of default port IO and MMIO handlers	2019-10-24 13:21:19 +08:00
hw	hv: vpci: remove pci_msi_cap in pci_pdev	2019-10-14 15:09:03 +08:00
lib	hv: add ACPI support for pre-launched VMs	2019-08-29 10:12:25 +08:00
public	hv: make hypercall HC_CREATE_VCPU empty	2019-09-24 11:58:45 +08:00