Sainath Grandhi 06b59e0bc1 hv: Use ptirq_lookup_entry_by_sid to lookup virtual source id in IOAPIC irq entries ... Reverts 538ba08c: hv:Add vpin to ptdev entry mapping for vpic/vioapic ACRN uses an array of size per VM to store ptirq entries against the vIOAPIC pin and an array of size per VM to store ptirq entries against the vPIC pin. This is done to speed up "ptirq entry" lookup at runtime for Level triggered interrupts in API ptirq_intx_ack used on EOI. This patch switches the lookup API for INTx interrupts to the API, ptirq_lookup_entry_by_sid This could add delay to processing EOI for Level triggered interrupts. Trade-off here is space saved for array/s of size CONFIG_MAX_IOAPIC_LINES with 8 bytes per data. On a server platform, ACRN needs to emulate multiple vIOAPICs for SOS VM, same as the number of physical IO-APICs. Thereby ACRN would need around 10 such arrays per VM. Removes the need of "pic_pin" except for the APIs facing the hypercalls hcall_set_ptdev_intr_info, hcall_reset_ptdev_intr_info Tracked-On: #4151 Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com> Acked-by: Eddie Dong <eddie.dong@Intel.com>		2020-03-25 09:36:18 +08:00
..
io_req.h	hv: mmio: refine mmio access handle lock granularity	2020-02-24 16:17:38 +08:00
vacpi.h	HV: rename CONFIG_MAX_PCPU_NUM to MAX_PCPU_NUM	2019-12-12 13:49:28 +08:00
vioapic.h	hv: Use ptirq_lookup_entry_by_sid to lookup virtual source id in IOAPIC irq entries	2020-03-25 09:36:18 +08:00
vpci.h	hv: vpci: handle the quirk part for pass through pci device cfg access in dm	2020-03-20 10:08:43 +08:00
vpic.h	hv: Use ptirq_lookup_entry_by_sid to lookup virtual source id in IOAPIC irq entries	2020-03-25 09:36:18 +08:00
vuart.h	hv: rename vuart operations	2019-11-08 09:01:01 +08:00