Li Fei1 0c6b3e57d6 hv: ptdev: minor refine about ptirq_build_physical_msi ... The virtual MSI information could be included in ptirq_remapping_info structrue, there's no need to pass another input paramater for this puepose. So we could remove the ptirq_msi_info input. Tracked-On: #4550 Signed-off-by: Li Fei1 <fei1.li@intel.com>		2020-05-06 11:51:11 +08:00
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arch/x86	hv: ptdev: minor refine about ptirq_build_physical_msi	2020-05-06 11:51:11 +08:00
common	hv: ptdev: minor refine about ptirq_build_physical_msi	2020-05-06 11:51:11 +08:00
debug	HV: correct ept page array usage	2020-03-12 14:56:34 +08:00
dm	hv: vioapic: minor refine about vioapic_init	2020-04-24 15:35:38 +08:00
hw	hv: vpci: handle the quirk part for pass through pci device cfg access in dm	2020-03-20 10:08:43 +08:00
lib	hv: list: rename list_entry to container_of	2020-03-31 10:57:47 +08:00
public	hv: dynamically configure CPU affinity through hypercall	2020-04-23 09:38:54 +08:00