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Instead of using CONFIG_PARTITION_MODE at compile time to compile in and call the partition mode/sharing mode specific functions, always compile in all sharing mode and partition code, then calling the corresponding functions dynamically based on vm type (PRE_LAUNCHED_VM and SOS_VM) at runtime. Some misra c fix: Add @pre for functions Add const to function parameters Add ASSERT in pci_cfgdata_io_read and pci_cfgdata_io_write Tracked-On: #2534 Signed-off-by: dongshen <dongsheng.x.zhang@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>
243 lines
6.3 KiB
C
243 lines
6.3 KiB
C
/*-
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* Copyright (c) 2011 NetApp, Inc.
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* Copyright (c) 2018 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <vm.h>
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#include <errno.h>
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#include <logmsg.h>
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#include "pci_priv.h"
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static void pci_cfg_clear_cache(struct pci_addr_info *pi)
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{
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pi->cached_bdf.value = 0xFFFFU;
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pi->cached_reg = 0U;
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pi->cached_enable = false;
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}
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/**
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* @pre vm != NULL
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*/
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static uint32_t pci_cfgaddr_io_read(struct acrn_vm *vm, uint16_t addr, size_t bytes)
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{
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uint32_t val = ~0U;
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struct acrn_vpci *vpci = &vm->vpci;
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struct pci_addr_info *pi = &vpci->addr_info;
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if ((addr == (uint16_t)PCI_CONFIG_ADDR) && (bytes == 4U)) {
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val = (uint32_t)pi->cached_bdf.value;
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val <<= 8U;
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val |= pi->cached_reg;
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if (pi->cached_enable) {
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val |= PCI_CFG_ENABLE;
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}
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}
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return val;
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}
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/**
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* @pre vm != NULL
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*/
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static void pci_cfgaddr_io_write(struct acrn_vm *vm, uint16_t addr, size_t bytes, uint32_t val)
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{
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struct acrn_vpci *vpci = &vm->vpci;
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struct pci_addr_info *pi = &vpci->addr_info;
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if ((addr == (uint16_t)PCI_CONFIG_ADDR) && (bytes == 4U)) {
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pi->cached_bdf.value = (uint16_t)(val >> 8U);
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pi->cached_reg = val & PCI_REGMAX;
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pi->cached_enable = ((val & PCI_CFG_ENABLE) == PCI_CFG_ENABLE);
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}
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}
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static inline bool vpci_is_valid_access_offset(uint32_t offset, uint32_t bytes)
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{
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return ((offset & (bytes - 1U)) == 0U);
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}
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static inline bool vpci_is_valid_access_byte(uint32_t bytes)
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{
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return ((bytes == 1U) || (bytes == 2U) || (bytes == 4U));
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}
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static inline bool vpci_is_valid_access(uint32_t offset, uint32_t bytes)
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{
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return (vpci_is_valid_access_byte(bytes) && vpci_is_valid_access_offset(offset, bytes));
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}
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/**
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* @pre vm != NULL
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* @pre vm->vm_id < CONFIG_MAX_VM_NUM
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* @pre (get_vm_config(vm->vm_id)->type == PRE_LAUNCHED_VM) || (get_vm_config(vm->vm_id)->type == SOS_VM)
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*/
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static uint32_t pci_cfgdata_io_read(struct acrn_vm *vm, uint16_t addr, size_t bytes)
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{
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struct acrn_vpci *vpci = &vm->vpci;
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struct pci_addr_info *pi = &vpci->addr_info;
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uint16_t offset = addr - PCI_CONFIG_DATA;
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uint32_t val = ~0U;
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struct acrn_vm_config *vm_config;
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if (pi->cached_enable) {
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if (vpci_is_valid_access(pi->cached_reg + offset, bytes)) {
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vm_config = get_vm_config(vm->vm_id);
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switch (vm_config->type) {
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case PRE_LAUNCHED_VM:
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partition_mode_cfgread(vpci, pi->cached_bdf, pi->cached_reg + offset, bytes, &val);
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break;
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case SOS_VM:
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sharing_mode_cfgread(vpci, pi->cached_bdf, pi->cached_reg + offset, bytes, &val);
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break;
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default:
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ASSERT(false, "Error, pci_cfgdata_io_read should only be called for PRE_LAUNCHED_VM and SOS_VM");
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break;
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}
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}
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pci_cfg_clear_cache(pi);
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}
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return val;
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}
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/**
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* @pre vm != NULL
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* @pre vm->vm_id < CONFIG_MAX_VM_NUM
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* @pre (get_vm_config(vm->vm_id)->type == PRE_LAUNCHED_VM) || (get_vm_config(vm->vm_id)->type == SOS_VM)
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*/
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static void pci_cfgdata_io_write(struct acrn_vm *vm, uint16_t addr, size_t bytes, uint32_t val)
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{
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struct acrn_vpci *vpci = &vm->vpci;
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struct pci_addr_info *pi = &vpci->addr_info;
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uint16_t offset = addr - PCI_CONFIG_DATA;
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struct acrn_vm_config *vm_config;
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if (pi->cached_enable) {
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if (vpci_is_valid_access(pi->cached_reg + offset, bytes)) {
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vm_config = get_vm_config(vm->vm_id);
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switch (vm_config->type) {
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case PRE_LAUNCHED_VM:
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partition_mode_cfgwrite(vpci, pi->cached_bdf, pi->cached_reg + offset, bytes, val);
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break;
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case SOS_VM:
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sharing_mode_cfgwrite(vpci, pi->cached_bdf, pi->cached_reg + offset, bytes, val);
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break;
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default:
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ASSERT(false, "Error, pci_cfgdata_io_write should only be called for PRE_LAUNCHED_VM and SOS_VM");
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break;
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}
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}
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pci_cfg_clear_cache(pi);
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}
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}
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/**
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* @pre vm != NULL
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* @pre vm->vm_id < CONFIG_MAX_VM_NUM
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*/
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void vpci_init(struct acrn_vm *vm)
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{
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struct acrn_vpci *vpci = &vm->vpci;
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int32_t ret = -EINVAL;
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struct vm_io_range pci_cfgaddr_range = {
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.flags = IO_ATTR_RW,
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.base = PCI_CONFIG_ADDR,
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.len = 1U
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};
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struct vm_io_range pci_cfgdata_range = {
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.flags = IO_ATTR_RW,
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.base = PCI_CONFIG_DATA,
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.len = 4U
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};
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struct acrn_vm_config *vm_config;
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vpci->vm = vm;
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vm_config = get_vm_config(vm->vm_id);
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switch (vm_config->type) {
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case PRE_LAUNCHED_VM:
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ret = partition_mode_vpci_init(vm);
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break;
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case SOS_VM:
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ret = sharing_mode_vpci_init(vm);
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break;
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default:
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/* Nothing to do for other vm types */
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break;
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}
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if (ret == 0) {
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/*
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* SOS: intercept port CF8 only.
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* UOS or partition mode: register handler for CF8 only and I/O requests to CF9/CFA/CFB are
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* not handled by vpci.
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*/
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register_pio_emulation_handler(vm, PCI_CFGADDR_PIO_IDX, &pci_cfgaddr_range,
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pci_cfgaddr_io_read, pci_cfgaddr_io_write);
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/* Intercept and handle I/O ports CFC -- CFF */
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register_pio_emulation_handler(vm, PCI_CFGDATA_PIO_IDX, &pci_cfgdata_range,
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pci_cfgdata_io_read, pci_cfgdata_io_write);
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}
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}
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/**
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* @pre vm != NULL
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* @pre vm->vm_id < CONFIG_MAX_VM_NUM
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*/
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void vpci_cleanup(const struct acrn_vm *vm)
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{
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struct acrn_vm_config *vm_config;
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vm_config = get_vm_config(vm->vm_id);
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switch (vm_config->type) {
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case PRE_LAUNCHED_VM:
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partition_mode_vpci_deinit(vm);
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break;
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case SOS_VM:
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sharing_mode_vpci_deinit(vm);
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break;
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default:
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/* Nothing to do for other vm types */
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break;
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}
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}
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