Jian Jun Chen 80f905f217 hv: pci: Hide PCI bridge 00:1c.0 from SOS ...

It is found that SOS will reset the PCI devices under PCI
bridge 00:1c.0 when 00:1c.0 is exposed to SOS. If a PCI
device under 00:1c.0 is passed through to pre-launched VM,
it will be reset by SOS at startup hence the passthrough
will not work properly. This patch provides a workaround
by hiding PCI bridge 00:1c.0 from SOS in this case.

Tracked-On: #5346
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>

2020-11-13 15:33:42 +08:00

..

boot

hv: don't need to save boot context

2020-10-29 10:05:05 +08:00

configs

hv: pci: Hide PCI bridge 00:1c.0 from SOS

2020-11-13 15:33:42 +08:00

guest

Fix: do not need to hide IO 0x3f8 for SOS on EHL

2020-11-12 11:40:05 +08:00

lib

HV: rewrite memcpy_s to be iso c11 compliant

2020-06-08 13:30:04 +08:00

seed

HV: rename append_seed_arg to fill_seed_arg

2020-06-08 13:30:04 +08:00

cpu_caps.c

hv:cpu-caps:refine is_apl_platform func and clean up duplicated code

2020-08-14 10:08:50 +08:00

cpu_state_tbl.c

HV: add board specific cpu state table to support Px Cx

2019-07-29 20:25:16 +08:00

cpu.c

hv: skip pSRAM for guest WBINVD emulation

2020-11-02 10:29:43 +08:00

e820.c

hv: Reserve space for VMs' EPT 4k pages after boot

2020-04-01 21:13:37 +08:00

gdt.c

hv:cleanup header files for arch folder

2019-02-22 13:14:36 +08:00

idt.S

HV: Install a NMI handler in acrn IDT

2019-12-13 10:13:09 +08:00

init.c

HV: split sanitize_multiboot_info api

2020-06-08 13:30:04 +08:00

ioapic.c

hv: mmu: rename hv_access_memory_region_update to ppt_clear_user_bit

2020-11-02 10:29:43 +08:00

irq.c

hv: remove de-privilege boot mode support and remove vboot wrappers

2020-10-21 15:09:26 +08:00

Kconfig

hv: psram: add kconfig to enable psram

2020-11-02 15:56:30 +08:00

lapic.c

hv:cpu-caps:refine processor family and model info

2020-08-14 10:08:50 +08:00

mmu.c

hv: mmu: rename hv_access_memory_region_update to ppt_clear_user_bit

2020-11-02 10:29:43 +08:00

notify.c

hv: maintain a per-pCPU array of vCPUs and handle posted interrupt IRQs

2020-04-15 13:47:22 +08:00

page.c

hv: mmu: rename hv_access_memory_region_update to ppt_clear_user_bit

2020-11-02 10:29:43 +08:00

pagetable.c

hv: mmu: release 1GB cpu side support constrain

2020-06-15 15:16:34 +08:00

platform_caps.c

hv: add function to check if using posted interrupt is possible for vm

2020-04-15 13:47:22 +08:00

pm.c

pm: S5: update the system shutdown logical in ACRN

2019-12-23 15:15:09 +08:00

ptcm.c

hv: pSRAM: temporarily remove NX bit of PTCM binary

2020-11-02 10:29:43 +08:00

rdt.c

acrn-config: code refactoring for CAT/MBA

2020-08-28 16:44:06 +08:00

sched.S

hv: sched: rename schedule related structs and vars

2019-10-16 10:25:53 +08:00

security.c

hv:cpu-caps:refine processor family and model info

2020-08-14 10:08:50 +08:00

sgx.c

hv: sgx: add basic support to init sgx resource for vm

2019-05-29 11:24:13 +08:00

timer.c

hv: list: rename list_entry to container_of

2020-03-31 10:57:47 +08:00

trampoline.c

hv: remove de-privilege boot mode support and remove vboot wrappers

2020-10-21 15:09:26 +08:00

vmx.c

hv:fix "no prototype for non-static function"

2019-07-09 10:36:03 +08:00

vtd.c

hv: mmu: rename hv_access_memory_region_update to ppt_clear_user_bit

2020-11-02 10:29:43 +08:00

wakeup.S

hv: pm: correct the function name

2019-09-11 17:30:24 +08:00