Binbin Wu 253852419a hv: pae: fix bug when calculate PDPT address ... There are two bugs related to PDPT address calculation for PAE mode. 1. Current code doesn't ignore the "Ignored" fileds when load pdpt registers. Mask the "Ignored" fileds according to SDM Figure 4-7 Vol3. 2. Current code only ignores 4bits instead of 5bits in low "Ignored" filed when calculate PDPT address in PAE mode for guest memory address translation. Tracked-On: #2561 Signed-off-by: Binbin Wu <binbin.wu@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>		2019-02-21 18:54:22 +08:00
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x86	hv: pae: fix bug when calculate PDPT address	2019-02-21 18:54:22 +08:00