Chaohong guo 2e01b4c8dc HV: trival changes to meet MISRA ...

add @pre for routines and bracks for condition checking in vlapic.c

Tracked-On: #861
Signed-off-by: Chaohong guo <chaohong.guo@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>

2019-01-02 16:22:11 +08:00

..

guest.c

HV: remove multiple return statement in get_vcpu_paging_mode() routine

2019-01-02 16:22:11 +08:00

instr_emul.c

hv: enable SMAP in hypervisor

2018-12-14 15:24:26 +08:00

instr_emul.h

hv: use int32_t replace int

2018-12-12 13:08:10 +08:00

pm.c

HV: fix pm code for multi-exits & unsigned const

2018-12-20 21:56:48 +08:00

ucode.c

hv: refine coding style for ucode.c

2018-12-19 09:44:42 +08:00

vcpu.c

hv: use asm_pause() to replace inline ASM to satisfy MISRAC

2018-12-27 12:35:40 +08:00

vcpuid.c

hv: coding style: add const qualifier for some function

2019-01-02 09:35:00 +08:00

vlapic_priv.h

hv: self-IPI APIC register in x2APIC mode of guest vLAPIC

2018-11-02 13:48:43 +08:00

vlapic.c

HV: trival changes to meet MISRA

2019-01-02 16:22:11 +08:00

vm.c

HV: disable vuart when dbg uart is disabled

2019-01-02 12:15:53 +08:00

vmcall.c

hv: vmcall: fix "goto detected" violations

2018-12-24 09:57:43 +08:00

vmsr.c

hv: fix enable_msr_interception() function

2018-12-20 18:46:19 +08:00

vmtrr.c

hv: refine a few functions to only one exit point

2018-12-19 09:17:30 +08:00