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x86/timer.[ch] was moved to the common directory largely unchanged. x86 specific code now resides in x86/tsc_deadline_timer.c and its interface was defined in hw/hw_timer.h. The interface defines two functions: init_hw_timer() and set_hw_timeout() that provides HW specific initialization and timer interrupt source. Other than these two functions, the timer module is largely arch agnostic. Tracked-On: #5920 Signed-off-by: Rong Liu <rong2.liu@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
ACRN Hypervisor ############### The open source `Project ACRN`_ defines a device hypervisor reference stack and an architecture for running multiple software subsystems, managed securely, on a consolidated system by means of a virtual machine manager. It also defines a reference framework implementation for virtual device emulation, called the "ACRN Device Model". The ACRN Hypervisor is a Type 1 reference hypervisor stack, running directly on the bare-metal hardware, and is suitable for a variety of IoT and embedded device solutions. The ACRN hypervisor addresses the gap that currently exists between datacenter hypervisors, and hard partitioning hypervisors. The ACRN hypervisor architecture partitions the system into different functional domains, with carefully selected guest OS sharing optimizations for IoT and embedded devices. You can find out more about Project ACRN on the `Project ACRN documentation`_ website. .. _`Project ACRN`: https://projectacrn.org .. _`ACRN Hypervisor`: https://github.com/projectacrn/acrn-hypervisor .. _`Project ACRN documentation`: https://projectacrn.github.io/