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https://github.com/projectacrn/acrn-hypervisor.git
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3b88d3c2ac
a guest may use per-cpu vector allocation mechanism which may lead to same vector on different vcpu for different vioapic pins. when we broadcast EOI from vlapic to vioapic, it could trigger ptdev_intx_ack for incorrect vioapic pin which will lead to incorrect vioapic irq deassert. old implementation is recording assert & deassert by acnt, like: - assert -> acnt++ - deassert -> acnt-- which means an incorrect deassert may descrease acnt from 0 to -1, it leads to error. this patch change the recording method for a pin assert/deassert, it just use pin_state bit set/clear to indicate line state: - high -> pin_state bitmap set - low -> pin_state bitmap clear and the irq assert will be triggered based on polarity setting during line state changing. it can avoid the failure of incorrect deassert on old implementation, and for ptdev sharing irq, the dev hardware could re-trigger interrupt after deassert. but for emulated device, there is no mechanism to re-trigger interrupt if there is irq sharing - for DM, we already has constraint to restrict vGSI sharing, so there is no problem of it. Tracked-On: #1269 Signed-off-by: Jason Chen CJ <jason.cj.chen@intel.com>
71 lines
2.6 KiB
C
71 lines
2.6 KiB
C
/*-
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* Copyright (c) 2013 Tycho Nightingale <tycho.nightingale@pluribusnetworks.com>
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* Copyright (c) 2013 Neel Natu <neel@freebsd.org>
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* Copyright (c) 2017 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef VIOAPIC_H
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#define VIOAPIC_H
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#include <apicreg.h>
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#define VIOAPIC_BASE 0xFEC00000UL
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#define VIOAPIC_SIZE 4096UL
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#define REDIR_ENTRIES_HW 120U /* SOS align with native ioapic */
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#define STATE_BITMAP_SIZE INT_DIV_ROUNDUP(REDIR_ENTRIES_HW, 64U)
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struct acrn_vioapic {
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struct vm *vm;
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spinlock_t mtx;
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uint32_t id;
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uint32_t ioregsel;
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union ioapic_rte rtbl[REDIR_ENTRIES_HW];
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/* pin_state status bitmap: 1 - high, 0 - low */
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uint64_t pin_state[STATE_BITMAP_SIZE];
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};
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void vioapic_init(struct vm *vm);
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void vioapic_cleanup(struct acrn_vioapic *vioapic);
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void vioapic_reset(struct acrn_vioapic *vioapic);
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void vioapic_set_irq(struct vm *vm, uint32_t irq, uint32_t operation);
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void vioapic_set_irq_nolock(struct vm *vm, uint32_t irq, uint32_t operation);
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void vioapic_update_tmr(struct vcpu *vcpu);
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uint32_t vioapic_pincount(struct vm *vm);
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void vioapic_process_eoi(struct vm *vm, uint32_t vector);
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void vioapic_get_rte(struct vm *vm, uint32_t pin, union ioapic_rte *rte);
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int vioapic_mmio_access_handler(struct vcpu *vcpu,
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struct io_request *io_req);
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#ifdef HV_DEBUG
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void get_vioapic_info(char *str_arg, size_t str_max, uint16_t vmid);
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#endif /* HV_DEBUG */
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#endif /* VIOAPIC_H */
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