Files
acrn-hypervisor/hypervisor/arch/x86
Yonghua Huang 442fc30117 hv: refine virtualization flow for cr0 and cr4
- The current code to virtualize CR0/CR4 is not
   well designed, and hard to read.
   This patch reshuffle the logic to make it clear
   and classify those bits into PASSTHRU,
   TRAP_AND_PASSTHRU, TRAP_AND_EMULATE & reserved bits.

Tracked-On: #5586
Signed-off-by: Eddie Dong <eddie.dong@intel.com>
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
2020-12-18 11:21:22 +08:00
..
2020-10-29 10:05:05 +08:00
2020-11-26 12:56:28 +08:00
2019-12-13 10:13:09 +08:00
2020-11-02 15:56:30 +08:00
2019-09-11 17:30:24 +08:00