Yin Fengwei 4579e57e7b hv: add gva check for the case gva is from instruction decode ... For the instructions other than MOVS, one operand is register and another one is memory which trigger EPT voilation. In this case, there is one possibility that EPT voilation happens before guest fault: the fault is triggered by related guest PTE access bit voilation (like write to a gva with R/W bit cleared in PTE). So we do this kind of check and inject exception to guest accordingly during instruction decoding phase. Signed-off-by: Yin Fengwei <fengwei.yin@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>		2018-08-23 11:13:48 +08:00
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guest.c	hv: ept: refine ept_mr_add base on mmu_add	2018-08-23 11:10:26 +08:00
instr_emul.c	hv: add gva check for the case gva is from instruction decode	2018-08-23 11:13:48 +08:00
instr_emul.h	HV: instr_emul: Remove dead code	2018-08-07 12:09:22 +08:00
mptable.c	hv: fix size issue in mptable guest copy - ACRN partition mode	2018-08-17 10:06:38 +08:00
pm.c	HV: Logical conjunction needs brackets under /arch/x86/guest	2018-08-14 09:53:32 +08:00
ucode.c	hv: get correct fault address for copy_to/from_gva	2018-08-09 14:46:13 +08:00
vcpu.c	hv:Changed several APIs to void type	2018-08-23 08:54:54 +08:00
vlapic_priv.h	HV: remove callbacks registration for APICv functions	2018-08-23 11:11:21 +08:00
vlapic.c	HV: remove callbacks registration for APICv functions	2018-08-23 11:11:21 +08:00
vm.c	hv: Add vrtc emulation support for ACRN partition mode	2018-08-16 16:23:11 +08:00
vmcall.c	hv: add a hypercall for the hypervisor NPK log	2018-08-23 11:09:25 +08:00
vmsr.c	hv: code clean up regarding to % and / operations	2018-08-22 15:37:53 +08:00