mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-05-09 08:56:55 +00:00
26021bd467
This patch adds interrupt pin related information into the board XML,
including:
* The PCI routing table in ACPI DSDT/SSDT are parsed and generated into
the board XML as "interrupt_pin_routing" nodes.
* IRQs encoded in _CRS directly are represented as resources of type
"irq".
* Interrupt lines (i.e. INTx#) of PCI devices are represented as
resources of type "interrupt_pin". When the PCI routing table is
available, the corresponding interrupt line is identified and
represented as the "source" attribute of the resource node.
Due to the existence of vIOAPIC in ACRN VMs, the board inspector interprets
the \_PIC method with parameter 1 to inform the ACPI namespace that the
interrupt model should be in APIC mode.
v1 -> v2:
* Remove the msi_enable variable which is defined but never used.
Tracked-On: #6287
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
349 lines
16 KiB
Python
349 lines
16 KiB
Python
#!/usr/bin/env python3
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#
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# Copyright (C) 2021 Intel Corporation.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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import sys, os, re
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sys.path.append(os.path.join(os.path.dirname(os.path.abspath(__file__)), '..', 'library'))
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import common, lib.error, lib.lib
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from collections import namedtuple
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# VMSIX devices list
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TSN_DEVS = [("0x8086", "0x4b30"), ("0x8086", "0x4b31"), ("0x8086", "0x4b32"), ("0x8086", "0x4ba0"),
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("0x8086", "0x4ba1"), ("0x8086", "0x4ba2"), ("0x8086", "0x4bb0"), ("0x8086", "0x4bb1"),
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("0x8086", "0x4bb2"), ("0x8086", "0xa0ac"), ("0x8086", "0x43ac"), ("0x8086", "0x43a2")]
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GPIO_DEVS = [("0x8086", "0x4b88"), ("0x8086", "0x4b89")]
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KNOWN_CAPS_PCI_DEVS_DB = {
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"VMSIX": TSN_DEVS + GPIO_DEVS,
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}
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# Constants for device name prefix
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IVSHMEM = "IVSHMEM"
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VUART = "VUART"
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PTDEV = "PTDEV"
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# A bar in pci hole must be above this threshold
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# A bar's address below this threshold is for special purpose and should be preserved
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PCI_HOLE_THRESHOLD = 0x100000
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# Common memory size units
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SIZE_K = 1024
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SIZE_M = SIZE_K * 1024
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SIZE_G = SIZE_M * 1024
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# Bar base alignment constant
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VBAR_ALIGNMENT = 4 * SIZE_K
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# Memory bar bits
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PREFETCHABLE_BIT = 0x8
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MEMORY_BAR_LOCATABLE_64BITS = 0x4
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# Pre-launched VM MMIO windows constant
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PRE_LAUNCHED_VM_LOW_MEM_START = 2 * SIZE_G
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PRE_LAUNCHED_VM_LOW_MEM_END = 3.5 * SIZE_G
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PRE_LAUNCHED_VM_HIGH_MEM_START = 256 * SIZE_G
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PRE_LAUNCHED_VM_HIGH_MEM_END = 512 * SIZE_G
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# Constants for ivshmem
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BAR0_SHEMEM_SIZE = 4 * SIZE_K
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BAR1_SHEMEM_SIZE = 4 * SIZE_K
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BAR2_SHEMEM_ALIGNMENT = 2 * common.SIZE_M
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# Constants for pci vuart
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PCI_VUART_VBAR0_SIZE = 4 * SIZE_K
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PCI_VUART_VBAR1_SIZE = 4 * SIZE_K
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# Constants for vmsix bar
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VMSIX_VBAR_SIZE = 4 * SIZE_K
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class MmioWindow(namedtuple(
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"MmioWindow", [
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"start",
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"end"])):
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PATTERN = re.compile(r"\s*(?P<start>[0-9a-f]+)-(?P<end>[0-9a-f]+) ")
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@classmethod
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def from_str(cls, value):
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if not isinstance(value, str):
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raise ValueError("value must be a str: {}".format(type(value)))
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match = cls.PATTERN.fullmatch(value)
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if match:
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return MmioWindow(
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start=int(match.group("start"), 16),
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end=int(match.group("end"), 16))
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else:
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raise ValueError("not an mmio window: {!r}".format(value))
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def overlaps(self, other):
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if not isinstance(other, MmioWindow):
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raise TypeError('overlaps() other must be an MmioWindow: {}'.format(type(other)))
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if other.end < self.start:
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return False
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if self.end < other.start:
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return False
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return True
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def insert_vuart_to_dev_dict(scenario_etree, devdict_32bits):
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console_vuart = scenario_etree.xpath(f"./console_vuart[base != 'INVALID_PCI_BASE']/@id")
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communication_vuarts = scenario_etree.xpath(f".//communication_vuart[base != 'INVALID_PCI_BASE']/@id")
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for vuart_id in console_vuart:
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devdict_32bits[(f"{VUART}_{vuart_id}", "bar0")] = PCI_VUART_VBAR0_SIZE
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devdict_32bits[(f"{VUART}_{vuart_id}", "bar1")] = PCI_VUART_VBAR1_SIZE
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for vuart_id in communication_vuarts:
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devdict_32bits[(f"{VUART}_{vuart_id}", "bar0")] = PCI_VUART_VBAR0_SIZE
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devdict_32bits[(f"{VUART}_{vuart_id}", "bar1")] = PCI_VUART_VBAR1_SIZE
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def insert_ivsheme_to_dev_dict(scenario_etree, devdict_32bits, devdict_64bits, vm_id):
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shmem_regions = lib.lib.get_shmem_regions(scenario_etree)
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if vm_id not in shmem_regions:
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return
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shmems = shmem_regions.get(vm_id)
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for shm in shmems.values():
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try:
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int_size = int(shm.get('size')) * SIZE_M
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except:
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continue
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idx = shm.get('id')
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devdict_32bits[(f"{IVSHMEM}_{idx}", "bar0")] = BAR0_SHEMEM_SIZE
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devdict_32bits[(f"{IVSHMEM}_{idx}", "bar1")] = BAR1_SHEMEM_SIZE
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devdict_64bits[(f"{IVSHMEM}_{idx}", "bar2")] = int_size
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def insert_pt_devs_to_dev_dict(board_etree, vm_node_etree, devdict_32bits, devdict_64bits):
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pt_devs = vm_node_etree.xpath(f".//pci_dev/text()")
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for pt_dev in pt_devs:
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bdf = pt_dev.split()[0]
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bus = int(bdf.split(':')[0], 16)
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dev = int(bdf.split(":")[1].split('.')[0], 16)
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func = int(bdf.split(":")[1].split('.')[1], 16)
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pt_dev_node = common.get_node(f"//bus[@type = 'pci' and @address = '{hex(bus)}']/device[@address = '{hex((dev << 16) | func)}']", board_etree)
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if pt_dev_node is not None:
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insert_vmsix_to_dev_dict(pt_dev_node, devdict_32bits)
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pt_dev_resources = pt_dev_node.xpath(".//resource[@type = 'memory' and @len != '0x0' and @id and @width]")
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for pt_dev_resource in pt_dev_resources:
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if int(pt_dev_resource.get('min'), 16) < PCI_HOLE_THRESHOLD:
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continue
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dev_name = f"{PTDEV}_{bus:#04x}_{((dev << 16) | func):#08x}".upper()
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bar_len = pt_dev_resource.get('len')
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bar_region = pt_dev_resource.get('id')
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bar_width = pt_dev_resource.get('width')
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if bar_width == "32":
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devdict_32bits[(f"{dev_name}", f"{bar_region}")] = int(bar_len, 16)
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else:
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devdict_64bits[(f"{dev_name}", f"{bar_region}")] = int(bar_len, 16)
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def insert_vmsix_to_dev_dict(pt_dev_node, devdict):
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"""
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Allocate an unused mmio window for the first free bar region of a vmsix supported passthrough device.
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1. Check if this passtrhough device is in the list "KNOWN_CAPS_PCI_DEVS_DB" of "VMSIX" suppoeted device.
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2. Find the first unused region index for the vmsix bar.
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3. Allocate an unused mmio window for this bar.
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"""
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vendor = common.get_node("./vendor/text()", pt_dev_node)
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identifier = common.get_node("./identifier/text()", pt_dev_node)
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if vendor is None or identifier is None:
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return
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if (vendor, identifier) in KNOWN_CAPS_PCI_DEVS_DB.get('VMSIX'):
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bar_regions = pt_dev_node.xpath(".//resource[@type = 'memory' and @width]")
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bar_32bits = [bar_region.get('id') for bar_region in bar_regions if bar_region.get('width') == '32']
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bar_32bits_idx_list = [int(bar.split('bar')[-1]) for bar in bar_32bits]
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bar_64bits = [bar_region.get('id') for bar_region in bar_regions if bar_region.get('width') == '64']
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bar_64bits_idx_list_1 = [int(bar.split('bar')[-1]) for bar in bar_64bits]
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bar_64bits_idx_list_2 = [idx + 1 for idx in bar_64bits_idx_list_1]
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used_bar_index = set(bar_32bits_idx_list + bar_64bits_idx_list_1 + bar_64bits_idx_list_2)
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unused_bar_index = [i for i in range(6) if i not in used_bar_index]
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try:
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next_bar_region = unused_bar_index.pop(0)
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except IndexError:
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raise lib.error.ResourceError(f"Cannot allocate a bar index for vmsix supported device: {vendor}:{identifier}, used bar idx list: {used_bar_index}")
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address = common.get_node("./@address", pt_dev_node)
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bus = common.get_node(f"../@address", pt_dev_node)
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if bus is not None and address is not None:
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dev_name = f"{PTDEV}_{int(bus, 16):#04x}_{int(address, 16):#08x}".upper()
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devdict[(f"{dev_name}", f"bar{next_bar_region}")] = VMSIX_VBAR_SIZE
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def get_devs_mem_native(board_etree, mems):
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nodes = board_etree.xpath(f"//resource[@type = 'memory' and @len != '0x0' and @id and @width]")
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dev_list = []
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for node in nodes:
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start = node.get('min')
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end = node.get('max')
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if start is not None and end is not None:
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window = MmioWindow(int(start, 16), int(end, 16))
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for mem in mems:
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if window.start >= mem.start and window.end <= mem.end:
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dev_list.append(window)
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break
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return sorted(dev_list)
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def get_devs_mem_passthrough(board_etree, scenario_etree):
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"""
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Get all pre-launched vms' passthrough devices' mmio windows in native environment.
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return: list of passtrhough devices' mmio windows.
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"""
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dev_list = []
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for vm_type in lib.lib.PRE_LAUNCHED_VMS_TYPE:
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pt_devs = scenario_etree.xpath(f"//vm[vm_type = '{vm_type}']/pci_devs/pci_dev/text()")
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for pt_dev in pt_devs:
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bdf = pt_dev.split()[0]
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bus = int(bdf.split(':')[0], 16)
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dev = int(bdf.split(":")[1].split('.')[0], 16)
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func = int(bdf.split(":")[1].split('.')[1], 16)
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resources = board_etree.xpath(f"//bus[@address = '{hex(bus)}']/device[@address = '{hex((dev << 16) | func)}'] \
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/resource[@type = 'memory' and @len != '0x0' and @width]")
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for resource in resources:
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start = resource.get('min')
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end = resource.get('max')
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dev_list.append(MmioWindow(int(start, 16), int(end, 16)))
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return dev_list
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def get_pci_hole_native(board_etree):
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resources = board_etree.xpath(f"//bus[@type = 'pci']/device[@address]/resource[@type = 'memory' and @len != '0x0']")
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resources_hostbridge = board_etree.xpath("//bus[@address = '0x0']/resource[@type = 'memory' and @len != '0x0' and not(starts-with(@id, 'bar')) and not(@width)]")
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low_mem = set()
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high_mem = set()
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for resource_hostbridge in resources_hostbridge:
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start = resource_hostbridge.get('min')
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end = resource_hostbridge.get('max')
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if start is not None and end is not None and int(start, 16) >= PCI_HOLE_THRESHOLD:
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for resource in resources:
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resource_start = int(resource.get('min'), 16)
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resource_end = int(resource.get('max'), 16)
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if resource_start >= int(start, 16) and resource_end <= int(end, 16):
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if resource_end < 4 * SIZE_G:
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low_mem.add(MmioWindow(int(start, 16), int(end, 16)))
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break
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else:
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high_mem.add(MmioWindow(int(start, 16), int(end, 16)))
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break
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return list(sorted(low_mem)), list(sorted(high_mem))
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def create_device_node(allocation_etree, vm_id, devdict):
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for dev in devdict:
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dev_name = dev[0]
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bar_region = dev[1].split('bar')[-1]
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bar_base = devdict.get(dev)
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vm_node = common.get_node(f"/acrn-config/vm[@id = '{vm_id}']", allocation_etree)
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if vm_node is None:
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vm_node = common.append_node("/acrn-config/vm", None, allocation_etree, id = vm_id)
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dev_node = common.get_node(f"./device[@name = '{dev_name}']", vm_node)
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if dev_node is None:
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dev_node = common.append_node("./device", None, vm_node, name = dev_name)
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if common.get_node(f"./bar[@id='{bar_region}']", dev_node) is None:
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common.append_node(f"./bar", hex(bar_base), dev_node, id = bar_region)
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if IVSHMEM in dev_name and bar_region == '2':
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common.update_text(f"./bar[@id = '2']", hex(bar_base | PREFETCHABLE_BIT | MEMORY_BAR_LOCATABLE_64BITS), dev_node, True)
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def create_native_pci_hole_node(allocation_etree, low_mem, high_mem):
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common.append_node("/acrn-config/hv/MMIO/MMIO32_START", hex(low_mem[0].start).upper(), allocation_etree)
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common.append_node("/acrn-config/hv/MMIO/MMIO32_END", hex(low_mem[0].end + 1).upper(), allocation_etree)
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if len(high_mem):
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common.append_node("/acrn-config/hv/MMIO/MMIO64_START", hex(high_mem[0].start).upper(), allocation_etree)
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common.append_node("/acrn-config/hv/MMIO/MMIO64_END", hex(high_mem[0].end + 1).upper(), allocation_etree)
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common.append_node("/acrn-config/hv/MMIO/HI_MMIO_START", hex(high_mem[0].start).upper(), allocation_etree)
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common.append_node("/acrn-config/hv/MMIO/HI_MMIO_END", hex(high_mem[0].end + 1).upper(), allocation_etree)
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else:
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common.append_node("/acrn-config/hv/MMIO/MMIO64_START", "~0".upper(), allocation_etree)
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common.append_node("/acrn-config/hv/MMIO/MMIO64_END", "~0", allocation_etree)
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common.append_node("/acrn-config/hv/MMIO/HI_MMIO_START", "~0".upper(), allocation_etree)
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common.append_node("/acrn-config/hv/MMIO/HI_MMIO_END", "0", allocation_etree)
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def get_free_mmio(windowslist, used, size):
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if not size:
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raise ValueError(f"allocate size cannot be: {size}")
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if not windowslist:
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raise ValueError(f"No mmio range is specified:{windowslist}")
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alignment = max(VBAR_ALIGNMENT, size)
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for w in windowslist:
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new_w_start = common.round_up(w.start, alignment)
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window = MmioWindow(start = new_w_start, end = new_w_start + size - 1)
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for u in used:
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if window.overlaps(u):
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new_u_end = common.round_up(u.end + 1, alignment)
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window = MmioWindow(start = new_u_end, end = new_u_end + size - 1)
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continue
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if window.overlaps(w):
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return window
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raise lib.error.ResourceError(f"Not enough mmio window for a device size: {size}, free mmio windows: {windowslist}, used mmio windos{used}")
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def alloc_mmio(mems, devdict, used_mem):
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devdict_list = sorted(devdict.items(), key = lambda t : t[1], reverse = True)
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devdict_base = {}
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for dev_bar in devdict_list:
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bar_name = dev_bar[0]
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bar_length = dev_bar[1]
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bar_window = get_free_mmio(mems, used_mem, bar_length)
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bar_end_addr = bar_window.start + bar_length - 1
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used_mem.append(MmioWindow(bar_window.start, bar_end_addr))
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used_mem.sort()
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devdict_base[bar_name] = bar_window.start
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return devdict_base
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def allocate_ssram_region(board_etree, scenario_etree, allocation_etree):
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# Guest physical address of the SW SRAM allocated to a pre-launched VM
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enabled = common.get_node("//PSRAM_ENABLED/text()", scenario_etree)
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if enabled == "y":
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pre_rt_vms = common.get_node("//vm[vm_type ='PRE_RT_VM']", scenario_etree)
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if pre_rt_vms is not None:
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vm_id = pre_rt_vms.get("id")
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l3_sw_sram = board_etree.xpath("//cache[@level='3']/capability[@id='Software SRAM']")
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if l3_sw_sram:
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start = min(map(lambda x: int(x.find("start").text, 16), l3_sw_sram))
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end = max(map(lambda x: int(x.find("end").text, 16), l3_sw_sram))
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allocation_vm_node = common.get_node(f"/acrn-config/vm[@id = '{vm_id}']", allocation_etree)
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if allocation_vm_node is None:
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allocation_vm_node = common.append_node("/acrn-config/vm", None, allocation_etree, id = vm_id)
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common.append_node("./ssram/start_gpa", hex(start), allocation_vm_node)
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common.append_node("./ssram/end_gpa", hex(end), allocation_vm_node)
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def fn(board_etree, scenario_etree, allocation_etree):
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allocate_ssram_region(board_etree, scenario_etree, allocation_etree)
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native_low_mem, native_high_mem = get_pci_hole_native(board_etree)
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create_native_pci_hole_node(allocation_etree, native_low_mem, native_high_mem)
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vm_nodes = scenario_etree.xpath("//vm")
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for vm_node in vm_nodes:
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vm_id = vm_node.get('id')
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devdict_32bits = {}
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devdict_64bits = {}
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insert_vuart_to_dev_dict(vm_node, devdict_32bits)
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insert_ivsheme_to_dev_dict(scenario_etree, devdict_32bits, devdict_64bits, vm_id)
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insert_pt_devs_to_dev_dict(board_etree, vm_node, devdict_32bits, devdict_64bits)
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low_mem = []
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high_mem = []
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used_low_mem = []
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used_high_mem = []
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vm_type = common.get_node("./vm_type/text()", vm_node)
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if vm_type is not None and lib.lib.is_pre_launched_vm(vm_type):
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low_mem = [MmioWindow(start = PRE_LAUNCHED_VM_LOW_MEM_START, end = PRE_LAUNCHED_VM_LOW_MEM_END - 1)]
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high_mem = [MmioWindow(start = PRE_LAUNCHED_VM_HIGH_MEM_START, end = PRE_LAUNCHED_VM_HIGH_MEM_END - 1)]
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elif vm_type is not None and lib.lib.is_sos_vm(vm_type):
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low_mem = native_low_mem
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high_mem = native_high_mem
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mem_passthrough = get_devs_mem_passthrough(board_etree, scenario_etree)
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used_low_mem_native = get_devs_mem_native(board_etree, low_mem)
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used_high_mem_native = get_devs_mem_native(board_etree, high_mem)
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# release the passthrough devices mmio windows from SOS
|
|
used_low_mem = [mem for mem in used_low_mem_native if mem not in mem_passthrough]
|
|
used_high_mem = [mem for mem in used_high_mem_native if mem not in mem_passthrough]
|
|
else:
|
|
# fall into else when the vm_type is post-launched vm, no mmio allocation is needed
|
|
continue
|
|
|
|
devdict_base_32_bits = alloc_mmio(low_mem, devdict_32bits, used_low_mem)
|
|
devdict_base_64_bits = alloc_mmio(low_mem + high_mem, devdict_64bits, used_low_mem + used_high_mem)
|
|
create_device_node(allocation_etree, vm_id, devdict_base_32_bits)
|
|
create_device_node(allocation_etree, vm_id, devdict_base_64_bits)
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