Kaige Fu accdadce98 HV: Enable vART support by intercepting TSC_ADJUST MSR ...

The policy of vART is that software in native can run in
VM too. And in native side, the relationship between the
ART hardware and TSC is:

  pTSC = (pART * M) / N + pAdjust

The vART solution is:
  - Present the ART capability to guest through CPUID leaf
    15H for M/N which identical to the physical values.
  - PT devices see the pART (vART = pART).
  - Guest expect: vTSC = vART * M / N + vAdjust.
  - VMCS.OFFSET = vTSC - pTSC = vAdjust - pAdjust.

So to support vART, we should do the following:
  1. if vAdjust and vTSC are changed by guest, we should change
     VMCS.OFFSET accordingly.
  2. Make the assumption that the pAjust is never touched by ACRN.

For #1, commit "a958fea hv: emulate IA32_TSC_ADJUST MSR" has implementation
it. And for #2, acrn never touch pAdjust.

--
 v2 -> v3:
   - Add comment when handle guest TSC_ADJUST and TSC accessing.
   - Initialize the VMCS.OFFSET = vAdjust - pAdjust.

 v1 -> v2
   Refine commit message to describe the whole vART solution.

Tracked-On: #3501
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>

2019-07-31 13:29:51 +08:00

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