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Project ACRN hypervisor
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Zhao Yakui 6b4ad0b449 HV: Add the volatile to avoid optimization for mmio_read/write access 
If subsequent write is on the same address, maybe the compiler will optimize
the access of MMIO memory and only the last write takes effect.In such case
it is wrong. For example:
  mmio_write_long(0x25, addr);
  mmio_write_long(0x26, addr);
  mmio_write_long(0x27, addr);

After volatile is added, it can avoid the above possible optimization and
assure that each write takes effect.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-05-15 17:25:55 +08:00
devicemodel dm: virtio-console: Fix the bug that ports cannot work 2018-05-15 17:25:55 +08:00
doc doc: doxygen improvements and known issues hiding 2018-05-15 17:25:54 +08:00
hypervisor HV: Add the volatile to avoid optimization for mmio_read/write access 2018-05-15 17:25:55 +08:00