Jian Jun Chen b854a24109 hv: risc-v: add C entry function of BSP and APs ...

Tracked-On: #8788
Signed-off-by: Haicheng Li <haicheng.li@intel.com>
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>

2025-09-15 13:12:21 +08:00

..

lib

[FIXME] hv: smpcall: riscv: add placeholder implementations for dependent code

2025-09-09 16:37:04 +08:00

cpu.h

[FIXME] hv: smpcall: riscv: add placeholder implementations for dependent code

2025-09-09 16:37:04 +08:00

init.h

hv: risc-v: add C entry function of BSP and APs

2025-09-15 13:12:21 +08:00

irq.h

hv: ipi: riscv: implement IPI using SBI interface

2025-09-09 16:37:04 +08:00

notify.h

hv: smpcall: riscv: implement SMP call handlers

2025-09-09 16:37:04 +08:00

per_cpu.h

hv: smpcall: riscv: implement SMP call handlers

2025-09-09 16:37:04 +08:00

sbi.h

hv: ipi: riscv: implement IPI using SBI interface

2025-09-09 16:37:04 +08:00