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Currently irq and vector numbers are used inconsistently.
* Sometimes vector or irq ids is used in bit operations, indicating
that they should be unsigned (which is required by MISRA C).
* At the same time we use -1 to indicate an unknown irq (in
common_register_handler()) or unavailable irq (in
alloc_irq()). Also (irq < 0) or (vector < 0) are used for error
checking. These indicate that irq or vector ids should be signed.
This patch converts irq and vector numbers to unsigned 32-bit integers, and
replace the previous -1 with IRQ_INVALID or VECTOR_INVALID. The branch
conditions are updated accordingly.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
Embedded-Hypervisor ################### This open source embedded hypervisor defines a software architecture for running multiple software subsystems managed securely on a consolidated system (by means of a virtual machine manager), and defines a reference framework Device Model implementation for devices emulation This embedded hypervisor is type-1 reference hypervisor, running directly on the system hardware. It can be used for building software defined cockpit (SDC) or In-Vehicle Experience (IVE) solutions running on Intel Architecture Apollo Lake platforms. As a reference implementation, it provides the basis for embedded hypervisor vendors to build solutions with an open source reference I/O mediation solution, and provides auto makers a reference software stack for SDC usage. This embedded hypervisor is able to support both Linux* and Android* as a Guest OS, managed by the hypervisor, where applications can run. This embedded hypervisor is a partitioning hypervisor reference stack, also suitable for non-automotive IoT & embedded device solutions. It will be addressing the gap that currently exists between datacenter hypervisors, hard partitioning hypervisors, and select industrial applications. Extending the scope of this open source embedded hypervisor relies on the involvement of community developers like you!