Nishioka, Toshiki 77fb21e98c hv: add vgpio device model support ... When HV pass through the P2SB MMIO device to pre-launched VM, vgpio device model traps MMIO access to the GPIO registers within P2SB so that it can expose virtual IOAPIC pins to the VM in accordance with the programmed mappings between gsi and vgsi. Tracked-On: #5246 Signed-off-by: Toshiki Nishioka <toshiki.nishioka@intel.com> Reviewed-by: Junjie Mao <junjie.mao@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>		2020-09-07 14:52:02 +08:00
..
boot	Revert "hv: Let trampoline execution use 1GB pages"	2020-06-15 15:16:34 +08:00
configs	HV: move vm configuration check to pre-build time	2020-08-12 10:21:17 +08:00
guest	hv: add vgpio device model support	2020-09-07 14:52:02 +08:00
lib	HV: rewrite memcpy_s to be iso c11 compliant	2020-06-08 13:30:04 +08:00
seed	HV: rename append_seed_arg to fill_seed_arg	2020-06-08 13:30:04 +08:00
cpu_caps.c	hv:cpu-caps:refine is_apl_platform func and clean up duplicated code	2020-08-14 10:08:50 +08:00
cpu_state_tbl.c	HV: add board specific cpu state table to support Px Cx	2019-07-29 20:25:16 +08:00
cpu.c	hv: implement ivshmem memory regions initialization	2020-08-19 15:06:15 +08:00
e820.c	hv: Reserve space for VMs' EPT 4k pages after boot	2020-04-01 21:13:37 +08:00
gdt.c	hv:cleanup header files for arch folder	2019-02-22 13:14:36 +08:00
idt.S	HV: Install a NMI handler in acrn IDT	2019-12-13 10:13:09 +08:00
init.c	HV: split sanitize_multiboot_info api	2020-06-08 13:30:04 +08:00
ioapic.c	hv:unify spin_lock initialization	2020-07-02 09:40:29 +08:00
irq.c	cleanup spin lock in irq.c	2020-06-19 16:13:20 +08:00
Kconfig	hv: debug: Convert PCI UART paramter from a BDF string to a hex value	2020-09-01 15:13:53 +08:00
lapic.c	hv:cpu-caps:refine processor family and model info	2020-08-14 10:08:50 +08:00
mmu.c	hv: Hypervisor access to PCI devices with 64-bit MMIO BARs	2020-04-13 16:52:18 +08:00
notify.c	hv: maintain a per-pCPU array of vCPUs and handle posted interrupt IRQs	2020-04-15 13:47:22 +08:00
page.c	hv: mmu: release 1GB cpu side support constrain	2020-06-15 15:16:34 +08:00
pagetable.c	hv: mmu: release 1GB cpu side support constrain	2020-06-15 15:16:34 +08:00
platform_caps.c	hv: add function to check if using posted interrupt is possible for vm	2020-04-15 13:47:22 +08:00
pm.c	pm: S5: update the system shutdown logical in ACRN	2019-12-23 15:15:09 +08:00
rdt.c	acrn-config: code refactoring for CAT/MBA	2020-08-28 16:44:06 +08:00
sched.S	hv: sched: rename schedule related structs and vars	2019-10-16 10:25:53 +08:00
security.c	hv:cpu-caps:refine processor family and model info	2020-08-14 10:08:50 +08:00
sgx.c	hv: sgx: add basic support to init sgx resource for vm	2019-05-29 11:24:13 +08:00
timer.c	hv: list: rename list_entry to container_of	2020-03-31 10:57:47 +08:00
trampoline.c	Revert "hv: Let trampoline execution use 1GB pages"	2020-06-15 15:16:34 +08:00
vmx.c	hv:fix "no prototype for non-static function"	2019-07-09 10:36:03 +08:00
vtd.c	hv: passthru DHRD-ignored device	2020-09-01 09:29:25 +08:00
wakeup.S	hv: pm: correct the function name	2019-09-11 17:30:24 +08:00