Yonghua Huang fd4775d044 hv: rename VECTOR_XXX and XXX_IRQ Macros ...

1. Align the coding style for these MACROs
  2. Align the values of fixed VECTORs

Tracked-On: #4348
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>

2020-01-14 10:21:23 +08:00

..

assign.c

hv: rename the ACRN_DBG_XXX

2020-01-14 10:21:23 +08:00

ept.c

hv: rename the ACRN_DBG_XXX

2020-01-14 10:21:23 +08:00

guest_memory.c

hv: rename the ACRN_DBG_XXX

2020-01-14 10:21:23 +08:00

hyperv.c

hv: rename the ACRN_DBG_XXX

2020-01-14 10:21:23 +08:00

instr_emul.c

hv: instr_emul: use cs segment when fetching instructions

2019-11-11 13:55:24 +08:00

pm.c

pm: S5: update the system shutdown logical in ACRN

2019-12-23 15:15:09 +08:00

trusty.c

hv: support xsave in context switch

2019-12-02 09:31:12 +08:00

ucode.c

…

vcpu.c

hv: vcpu: wait and signal vcpu event support

2020-01-07 11:23:32 +08:00

vcpuid.c

hv: cpuid: expose PCID related capabilities to VMs

2020-01-02 10:47:34 +08:00

virq.c

hv: rename the ACRN_DBG_XXX

2020-01-14 10:21:23 +08:00

virtual_cr.c

hv: cr: handle control registers related to PCID

2020-01-02 10:47:34 +08:00

vlapic_priv.h

hv: add ops to vlapic structure

2019-07-19 16:47:06 +08:00

vlapic.c

hv: rename VECTOR_XXX and XXX_IRQ Macros

2020-01-14 10:21:23 +08:00

vm_reset.c

reset: detect highest severity guest dynamically

2019-12-23 15:15:09 +08:00

vm.c

hv: rename VECTOR_XXX and XXX_IRQ Macros

2020-01-14 10:21:23 +08:00

vmcall.c

hv: refine 'uint64_t' string print format in x86 moudle

2019-11-09 11:42:38 +08:00

vmcs.c

hv: rename VECTOR_XXX and XXX_IRQ Macros

2020-01-14 10:21:23 +08:00

vmexit.c

hv: HLT emulation in hypervisor

2020-01-07 11:23:32 +08:00

vmsr.c

hv: msr: remove redundant check in write_pat_msr

2019-12-16 14:32:42 +08:00

vmtrr.c

hv: refine 'uint64_t' string print format in x86 moudle

2019-11-09 11:42:38 +08:00

vmx_asm.S

…

vmx_io.c

hv: ept: disable execute right on large pages

2019-11-13 08:00:36 +08:00