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8c4a5987e3
Currently irq and vector numbers are used inconsistently.
* Sometimes vector or irq ids is used in bit operations, indicating
that they should be unsigned (which is required by MISRA C).
* At the same time we use -1 to indicate an unknown irq (in
common_register_handler()) or unavailable irq (in
alloc_irq()). Also (irq < 0) or (vector < 0) are used for error
checking. These indicate that irq or vector ids should be signed.
This patch converts irq and vector numbers to unsigned 32-bit integers, and
replace the previous -1 with IRQ_INVALID or VECTOR_INVALID. The branch
conditions are updated accordingly.
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
36 lines
1.0 KiB
C
36 lines
1.0 KiB
C
/*
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* Copyright (C) 2018 Intel Corporation. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef IOAPIC_H
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#define IOAPIC_H
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/* IOAPIC_MAX_LINES is architecturally defined.
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* The usable RTEs may be a subset of the total on a per IO APIC basis.
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*/
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#define IOAPIC_MAX_LINES 120
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#define NR_LEGACY_IRQ 16
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#define NR_LEGACY_PIN NR_LEGACY_IRQ
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#define NR_MAX_GSI (CONFIG_NR_IOAPICS*IOAPIC_MAX_LINES)
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#define GSI_MASK_IRQ(irq) irq_gsi_mask_unmask((irq), true)
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#define GSI_UNMASK_IRQ(irq) irq_gsi_mask_unmask((irq), false)
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#define GSI_SET_RTE(irq, rte) ioapic_set_rte((irq), (rte))
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void setup_ioapic_irq(void);
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int get_ioapic_info(char *str, int str_max_len);
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bool irq_is_gsi(uint32_t irq);
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uint32_t irq_gsi_num(void);
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int irq_to_pin(uint32_t irq);
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uint32_t pin_to_irq(int pin);
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void irq_gsi_mask_unmask(uint32_t irq, bool mask);
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void ioapic_set_rte(uint32_t irq, uint64_t rte);
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void ioapic_get_rte(uint32_t irq, uint64_t *rte);
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extern uint16_t legacy_irq_to_pin[];
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extern uint16_t pic_ioapic_pin_map[];
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#endif /* IOAPIC_H */
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