Haicheng Li bb9817b866 hv: multi-arch add RISC-V bits library implementation ...

Follow multi-arch design, implement the mandatory arch bit ops
functions declared in common bits.h for risc-v support.

Tracked-On: #8803
Signed-off-by: Haicheng Li <haicheng.li@linux.intel.com>
Signed-off-by: Haoyu Tang <haoyu.tang@intel.com>
Reviewed-by: Yifan Liu  <yifan1.liu@intel.com>
Acked-by: Wang, Yu1 <yu1.wang@intel.com>

2025-09-22 10:52:06 +08:00

..

atomic.h

hv: multi-arch add RISC-V atomic library implementation

2025-09-22 10:52:06 +08:00

barrier.h

hv: multi-arch add RISC-V barrier library implementation

2025-09-22 10:52:06 +08:00

bits.h

hv: multi-arch add RISC-V bits library implementation

2025-09-22 10:52:06 +08:00

memory.h

…

spinlock.h

hv: multi-arch add RISC-V spinlock library implementation

2025-09-22 10:52:06 +08:00