acrn-hypervisor/hypervisor/arch/x86
Li Fei1 ae4fa40adc hv: vpci: hv: vpci: refine pci device assignment logic
Now Host Bridge and PCI Bridge could only be added to SOS's acrn_vm_pci_dev_config.
So For UOS, we always emualte Host Bridge and PCI Bridge for it and assign PCI device
to it; for SOS, if it's the highest severity VM, we will assign Host Bridge and PCI
Bridge to it directly, otherwise, we will emulate them same as UOS.

Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-06-03 22:00:43 +08:00
..
boot HV: add a specific stack space used in CPU booting 2020-04-29 13:56:40 +08:00
configs hv: pci: check whether a PCI device is host bridge or not by class 2020-06-03 22:00:43 +08:00
guest hv: vpci: hv: vpci: refine pci device assignment logic 2020-06-03 22:00:43 +08:00
lib hv: refine retpoline speculation barriers 2020-02-26 09:24:54 +08:00
seed HV: init and sanitize acrn multiboot info 2020-02-26 09:24:16 +08:00
cpu_caps.c HV: enumerate capability of #AC for Splitlock Access 2020-04-17 09:53:59 +08:00
cpu_state_tbl.c HV: add board specific cpu state table to support Px Cx 2019-07-29 20:25:16 +08:00
cpu.c HV: Fix MP Init sequence hang by adding a delay 2020-05-27 13:34:59 +08:00
e820.c hv: Reserve space for VMs' EPT 4k pages after boot 2020-04-01 21:13:37 +08:00
gdt.c hv:cleanup header files for arch folder 2019-02-22 13:14:36 +08:00
idt.S HV: Install a NMI handler in acrn IDT 2019-12-13 10:13:09 +08:00
init.c hv: wrap a function to initialize pCPU for second phase 2020-04-16 14:02:29 +08:00
ioapic.c hv: vioapic init for SOS VM on platforms with multiple IO-APICs 2020-03-25 09:36:18 +08:00
irq.c hv: irq: minor refine about structure idt_64_descriptor 2020-04-26 10:48:49 +08:00
Kconfig hv: vtd: cleanup snoop control related code 2020-05-27 11:27:42 +08:00
lapic.c HV: Fix MP Init sequence hang by adding a delay 2020-05-27 13:34:59 +08:00
mmu.c hv: Hypervisor access to PCI devices with 64-bit MMIO BARs 2020-04-13 16:52:18 +08:00
notify.c hv: maintain a per-pCPU array of vCPUs and handle posted interrupt IRQs 2020-04-15 13:47:22 +08:00
page.c hv: Hypervisor access to PCI devices with 64-bit MMIO BARs 2020-04-13 16:52:18 +08:00
pagetable.c hv: mmu: minor fix about add_pte 2020-03-09 10:03:01 +08:00
platform_caps.c hv: add function to check if using posted interrupt is possible for vm 2020-04-15 13:47:22 +08:00
pm.c pm: S5: update the system shutdown logical in ACRN 2019-12-23 15:15:09 +08:00
rdt.c HV: RDT: add CDP support in ACRN 2020-05-08 08:50:13 +08:00
sched.S hv: sched: rename schedule related structs and vars 2019-10-16 10:25:53 +08:00
security.c hv: config: add an option to disable mce on psc workaround 2019-12-03 09:17:04 +08:00
sgx.c hv: sgx: add basic support to init sgx resource for vm 2019-05-29 11:24:13 +08:00
timer.c hv: list: rename list_entry to container_of 2020-03-31 10:57:47 +08:00
trampoline.c hv: refine 'uint64_t' string print format in x86 moudle 2019-11-09 11:42:38 +08:00
vmx.c hv:fix "no prototype for non-static function" 2019-07-09 10:36:03 +08:00
vtd.c hv: vtd: remove some unnecessary check 2020-05-27 11:27:42 +08:00
wakeup.S hv: pm: correct the function name 2019-09-11 17:30:24 +08:00