Zide Chen b22c8b696b hv: add more MSR definitions ... - add definitions of all architectural MSRs - add definitions of majority of non architectural MSRs The non-architectural MSR definitions are specific to particular CPU model or family. e.g. MSR 0xE01 could refer to different MSRs in difference processors, and in this patch, MSR_R0_PMON_BOX_STATUS is chosen without any particular reasons. MSR_R0_PMON_BOX_STATUS in Xeon Processor 7500 Series MSR_C0_PMON_EVNTSEL0 in Xeon E5 V3 family MSR_UNC_PERF_GLOBAL_CTRL in 6th plus generations Core Processors Tracked-On: #1867 Signed-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Eddie Dong <eddie.dong@intel.com>		2019-01-17 12:53:09 +08:00
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x86	hv: add more MSR definitions	2019-01-17 12:53:09 +08:00