Jian Jun Chen b3fa6bbced hv: riscv: implement virtual exception handling ...

Add virtual exception handling infrastructure for RISC-V hypervisor
and enables proper virtualization of RISC-V exceptions by allowing
the hypervisor to inject exceptions into guest VS-mode.
- Implement vcpu_set_trap() to inject traps to VS-mode
- Implement vcpu_queue_exception() to queue exceptions for vCPU injection
- Process pending exception requests in riscv_process_vcpu_requests()

v1->v2:
change vcpu_redirect_trap -> vcpu_set_trap

Tracked-On: #8844
Signed-off-by: Yi Y Sun <yi.y.sun@intel.com>
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Wang Yu1 <yu1.wang@intel.com>

2025-11-25 15:46:29 +08:00

..

riscv/asm

hv: riscv: implement virtual exception handling

2025-11-25 15:46:29 +08:00

x86/asm

hv: multi-arch: move NR_IRQS definition to arch-specific headers

2025-11-05 15:14:41 +08:00