acrn-hypervisor/hypervisor/arch/x86/guest
Yin Fengwei cfb2828585 hv: Avoid inject the same int to target vcpu multiple times
Once the specific interrupt is marked waiting for inject to
target vcpu, we don't need to mark it again if the same
interrupt is request to inject to same target vcpu.

One example is UP SOS + SMP UOS. It's possible that different
core of UOS try to notify SOS vcpu that there is ioreq pending.

Signed-off-by: Yin Fengwei <fengwei.yin@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2018-07-05 10:01:15 +08:00
..
guest.c HV:Treewide:Update the type of vcpu id as uint16_t 2018-07-04 14:28:52 +08:00
instr_emul_wrapper.c HV:guest:fix "signed/unsigned conversion without cast" 2018-07-04 12:18:38 +08:00
instr_emul_wrapper.h HV:guest:fix "signed/unsigned conversion without cast" 2018-07-04 12:18:38 +08:00
instr_emul.c HV:guest:fix "signed/unsigned conversion without cast" 2018-07-04 12:18:38 +08:00
instr_emul.h instr_emul: remove unnecessary params in __decode_instruction 2018-06-11 12:14:43 +08:00
pm.c HV:guest:fix "signed/unsigned conversion without cast" 2018-07-04 12:18:38 +08:00
ucode.c HV:guest:fix "signed/unsigned conversion without cast" 2018-07-04 12:18:38 +08:00
vcpu.c HV:treewide:Update cpu_id type as uint_16 2018-07-04 16:39:26 +08:00
vioapic.c HV: cleanup coding style violation 2018-07-05 10:00:14 +08:00
vlapic_priv.h hv:merge struct lapic and lapic_regs to lapic_regs 2018-07-02 10:49:14 +08:00
vlapic.c hv: Avoid inject the same int to target vcpu multiple times 2018-07-05 10:01:15 +08:00
vm.c HV:guest:fix "signed/unsigned conversion without cast" 2018-07-04 12:18:38 +08:00
vmcall.c HV: Make all trace event prefix consist with TRACE 2018-07-02 10:46:41 +08:00
vmsr.c HV:guest:fix "signed/unsigned conversion without cast" 2018-07-04 12:18:38 +08:00
vpic.c HV:treewide:Update return type of function ffs64 and ffz64 2018-07-02 15:11:22 +08:00