acrn-hypervisor/hypervisor/arch
Li, Fei1 bdae8efb7f hv: instr_emul: fix movzx return memory opsize wrong
There're some instructions which not support bit 0(w bit) flag but which
memory opcode size is fixed and the memory opcode size is not equal to the
register opcode size. In our code, there is movzx (which opcode is 0F B7)
which memory opcode size is fixed to 16 bits. So add a flag VIE_OP_F_WORD_OP
to indicate a instruction which memory opcode size is fixed to 16 bits.

Tracked-On: #1337
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2019-05-13 11:53:51 +08:00
..
x86 hv: instr_emul: fix movzx return memory opsize wrong 2019-05-13 11:53:51 +08:00