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Project ACRN hypervisor
Currently acrn partitions cpus between SOS and UOS, so the default policy is to allow guest managing CPU px state. However we would not blindly passthrough perf_ctrl MSR to guest. Instead guest access is always trapped and validated by acrn hypervisor before forwarding to pcpu. Doing so leaves room for future power budget control in hypervisor, e.g. limiting turbo percentage that a cpu can enter. Signed-off-by: Victor Sun <victor.sun@intel.com> Acked-by: Kevin Tian <kevin.tian@intel.com> |
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license_header | ||
MAINTAINERS | ||
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README.rst |
Embedded-Hypervisor ################### This open source embedded hypervisor defines a software architecture for running multiple software subsystems managed securely on a consolidated system (by means of a virtual machine manager), and defines a reference framework Device Model implementation for devices emulation This embedded hypervisor is type-1 reference hypervisor, running directly on the system hardware. It can be used for building software defined cockpit (SDC) or In-Vehicle Experience (IVE) solutions running on Intel Architecture Apollo Lake platforms. As a reference implementation, it provides the basis for embedded hypervisor vendors to build solutions with an open source reference I/O mediation solution, and provides auto makers a reference software stack for SDC usage. This embedded hypervisor is able to support both Linux* and Android* as a Guest OS, managed by the hypervisor, where applications can run. This embedded hypervisor is a partitioning hypervisor reference stack, also suitable for non-automotive IoT & embedded device solutions. It will be addressing the gap that currently exists between datacenter hypervisors, hard partitioning hypervisors, and select industrial applications. Extending the scope of this open source embedded hypervisor relies on the involvement of community developers like you!