Files
acrn-hypervisor/hypervisor/dm/vpci/vmsix.c
Li Fei1 ce3451827a hv: vpci: add vmsix capability registers rw permission control
Guest may write a MSI-X capability register with only RW bits setting on. This works
well on native since the hardware will make sure RO register bits could not over-write.
However, the software needs more efforts to achieve this. This patch does this by
defining a RW permission mapping base on bits. When a guest tries to write a MSI-X
Capability register, only modify the RW bits on vCFG space.

Tracked-On: #4550
Signed-off-by: Li Fei1 <fei1.li@intel.com>
2020-05-28 13:44:18 +08:00

8.3 KiB