Li Fei1 e5c7a96513 hv: vpci: sos could access low severity guest pci cfg space ... There're some cases the SOS (higher severity guest) needs to access the post-launched VM (lower severity guest) PCI CFG space: 1. The SR-IOV PF needs to reset the VF 2. Some pass through device still need DM to handle some quirk. In the case a device is assigned to a UOS and is not in a zombie state, the SOS is able to access, if and only if the SOS has higher severity than the UOS. Tracked-On: #4371 Signed-off-by: Li Fei1 <fei1.li@intel.com>		2020-03-20 10:08:43 +08:00
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arch/x86	hv: vpci: sos could access low severity guest pci cfg space	2020-03-20 10:08:43 +08:00
common	hv: Variable/macro renaming for intr handling of PT devices using IO-APIC/PIC	2020-03-06 11:29:02 +08:00
debug	HV: correct ept page array usage	2020-03-12 14:56:34 +08:00
dm	hv: refine naming	2020-03-11 08:35:30 +08:00
hw	hv: vpci: pass through stolen memory and opregion memory for GVT-D	2020-03-11 10:59:23 +08:00
lib	hv: support xsave in context switch	2019-12-02 09:31:12 +08:00
public	hv: vPCI: remove passthrough PCI device unuse code	2020-02-24 16:17:38 +08:00