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https://github.com/projectacrn/acrn-hypervisor.git
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05ad6d6628
This patch fixes the following issue pointed by Xiangyang and Junjie.
There are some macro arguments acting as formal parameter names.
Drop such arguments since they make no difference to the expanded
implementation and they might confuse some developers.
Here is an example.
'ptr' is dropped in this patch, which is acting as a formal parameter
name and make no difference to the expanded implementation.
-#define build_atomic_load(name, size, type, ptr) \
+#define build_atomic_load(name, size, type) \
static inline type name(const volatile type *ptr) \
{ \
type ret; \
asm volatile("mov" size " %1,%0" \
: "=r" (ret) \
: "m" (*ptr) \
: "cc", "memory"); \
return ret; \
}
Some minor coding style fixes are also included in this patch.
- use TAB for the alignment rather than mixing TAB with space
- fix some typo in the comments
Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
240 lines
6.5 KiB
C
240 lines
6.5 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* Copyright (c) 2018 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef ATOMIC_H
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#define ATOMIC_H
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#include <cpu.h>
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#define build_atomic_load(name, size, type) \
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static inline type name(const volatile type *ptr) \
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{ \
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type ret; \
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asm volatile("mov" size " %1,%0" \
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: "=r" (ret) \
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: "m" (*ptr) \
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: "cc", "memory"); \
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return ret; \
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}
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build_atomic_load(atomic_load32, "l", uint32_t)
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build_atomic_load(atomic_load64, "q", uint64_t)
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#define build_atomic_store(name, size, type) \
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static inline void name(volatile type *ptr, type v) \
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{ \
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asm volatile("mov" size " %1,%0" \
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: "=m" (*ptr) \
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: "r" (v) \
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: "cc", "memory"); \
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}
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build_atomic_store(atomic_store16, "w", uint16_t)
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build_atomic_store(atomic_store32, "l", uint32_t)
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build_atomic_store(atomic_store64, "q", uint64_t)
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#define build_atomic_inc(name, size, type) \
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static inline void name(type *ptr) \
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{ \
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asm volatile(BUS_LOCK "inc" size " %0" \
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: "=m" (*ptr) \
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: "m" (*ptr)); \
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}
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build_atomic_inc(atomic_inc32, "l", uint32_t)
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build_atomic_inc(atomic_inc64, "q", uint64_t)
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#define build_atomic_dec(name, size, type) \
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static inline void name(type *ptr) \
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{ \
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asm volatile(BUS_LOCK "dec" size " %0" \
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: "=m" (*ptr) \
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: "m" (*ptr)); \
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}
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build_atomic_dec(atomic_dec16, "w", uint16_t)
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build_atomic_dec(atomic_dec32, "l", uint32_t)
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build_atomic_dec(atomic_dec64, "q", uint64_t)
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/**
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* #define atomic_set32(P, V) (*(unsigned int *)(P) |= (V))
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*
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* Parameters:
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* uint32_t* p A pointer to memory area that stores source
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* value and setting result;
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* uint32_t v The value needs to be set.
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*/
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static inline void atomic_set32(uint32_t *p, uint32_t v)
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{
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__asm __volatile(BUS_LOCK "orl %1,%0"
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: "+m" (*p)
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: "r" (v)
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: "cc", "memory");
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}
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/*
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* #define atomic_clear32(P, V) (*(uint32_t *)(P) &= ~(V))
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* Parameters:
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* uint32_t* p A pointer to memory area that stores source
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* value and clearing result;
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* uint32_t v The value needs to be cleared.
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*/
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static inline void atomic_clear32(uint32_t *p, uint32_t v)
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{
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__asm __volatile(BUS_LOCK "andl %1,%0"
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: "+m" (*p)
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: "r" (~v)
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: "cc", "memory");
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}
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/*
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* #define atomic_set64(P, V) (*(uint64_t *)(P) |= (V))
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*
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* Parameters:
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* uint64_t* p A pointer to memory area that stores source
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* value and setting result;
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* uint64_t v The value needs to be set.
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*/
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static inline void atomic_set64(uint64_t *p, uint64_t v)
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{
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__asm __volatile(BUS_LOCK "orq %1,%0"
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: "+m" (*p)
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: "r" (v)
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: "cc", "memory");
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}
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/*
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* #define atomic_clear64(P, V) (*(uint64_t *)(P) &= ~(V))
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*
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* Parameters:
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* uint64_t* p A pointer to memory area that stores source
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* value and clearing result;
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* uint64_t v The value needs to be cleared.
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*/
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static inline void atomic_clear64(uint64_t *p, uint64_t v)
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{
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__asm __volatile(BUS_LOCK "andq %1,%0"
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: "+m" (*p)
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: "r" (~v)
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: "cc", "memory");
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}
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#define build_atomic_swap(name, size, type) \
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static inline type name(type *ptr, type v) \
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{ \
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asm volatile(BUS_LOCK "xchg" size " %1,%0" \
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: "+m" (*ptr), "+r" (v) \
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: \
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: "cc", "memory"); \
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return v; \
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}
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build_atomic_swap(atomic_swap32, "l", uint32_t)
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build_atomic_swap(atomic_swap64, "q", uint64_t)
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/*
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* #define atomic_readandclear32(P) \
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* (return (*(uint32_t *)(P)); *(uint32_t *)(P) = 0U;)
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*/
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static inline uint32_t atomic_readandclear32(uint32_t *p)
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{
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return atomic_swap32(p, 0U);
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}
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/*
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* #define atomic_readandclear64(P) \
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* (return (*(uint64_t *)(P)); *(uint64_t *)(P) = 0UL;)
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*/
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static inline uint64_t atomic_readandclear64(uint64_t *p)
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{
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return atomic_swap64(p, 0UL);
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}
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#define build_atomic_cmpxchg(name, size, type) \
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static inline type name(volatile type *ptr, type old, type new) \
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{ \
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type ret; \
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asm volatile(BUS_LOCK "cmpxchg" size " %2,%1" \
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: "=a" (ret), "+m" (*ptr) \
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: "r" (new), "0" (old) \
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: "memory"); \
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return ret; \
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}
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build_atomic_cmpxchg(atomic_cmpxchg32, "l", uint32_t)
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build_atomic_cmpxchg(atomic_cmpxchg64, "q", uint64_t)
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#define build_atomic_xadd(name, size, type) \
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static inline type name(type *ptr, type v) \
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{ \
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asm volatile(BUS_LOCK "xadd" size " %0,%1" \
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: "+r" (v), "+m" (*ptr) \
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: \
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: "cc", "memory"); \
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return v; \
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}
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build_atomic_xadd(atomic_xadd16, "w", uint16_t)
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build_atomic_xadd(atomic_xadd32, "l", int32_t)
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build_atomic_xadd(atomic_xadd64, "q", int64_t)
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static inline int32_t atomic_add_return(int32_t *p, int32_t v)
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{
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return (atomic_xadd32(p, v) + v);
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}
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static inline int32_t atomic_sub_return(int32_t *p, int32_t v)
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{
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return (atomic_xadd32(p, -v) - v);
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}
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static inline int32_t atomic_inc_return(int32_t *v)
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{
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return atomic_add_return(v, 1);
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}
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static inline int32_t atomic_dec_return(int32_t *v)
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{
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return atomic_sub_return(v, 1);
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}
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static inline int64_t atomic_add64_return(int64_t *p, int64_t v)
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{
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return (atomic_xadd64(p, v) + v);
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}
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static inline int64_t atomic_sub64_return(int64_t *p, int64_t v)
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{
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return (atomic_xadd64(p, -v) - v);
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}
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static inline int64_t atomic_inc64_return(int64_t *v)
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{
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return atomic_add64_return(v, 1);
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}
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static inline int64_t atomic_dec64_return(int64_t *v)
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{
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return atomic_sub64_return(v, 1);
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}
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#endif /* ATOMIC_H*/
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