mirror of
https://github.com/projectacrn/acrn-hypervisor.git
synced 2025-07-31 15:30:56 +00:00
hv: drop the macro arguments acting as formal parameter names
This patch fixes the following issue pointed by Xiangyang and Junjie.
There are some macro arguments acting as formal parameter names.
Drop such arguments since they make no difference to the expanded
implementation and they might confuse some developers.
Here is an example.
'ptr' is dropped in this patch, which is acting as a formal parameter
name and make no difference to the expanded implementation.
-#define build_atomic_load(name, size, type, ptr) \
+#define build_atomic_load(name, size, type) \
static inline type name(const volatile type *ptr) \
{ \
type ret; \
asm volatile("mov" size " %1,%0" \
: "=r" (ret) \
: "m" (*ptr) \
: "cc", "memory"); \
return ret; \
}
Some minor coding style fixes are also included in this patch.
- use TAB for the alignment rather than mixing TAB with space
- fix some typo in the comments
Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
This commit is contained in:
Shiqing Gao
lijinxia
parent
74622d7d29
commit
05ad6d6628
@ -633,19 +633,19 @@ static void vie_update_rflags(struct vcpu *vcpu, uint64_t rflags2, uint64_t psl)
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/*
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* Return the status flags that would result from doing (x - y).
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*/
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#define build_getcc(name, type, x, y) \
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static uint64_t name(type x, type y) \
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{ \
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uint64_t rflags; \
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\
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#define build_getcc(name, type) \
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static uint64_t name(type x, type y) \
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{ \
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uint64_t rflags; \
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\
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__asm __volatile("sub %2,%1; pushfq; popq %0" : \
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"=r" (rflags), "+r" (x) : "m" (y)); \
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return rflags; \
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}
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build_getcc(getcc8, uint8_t, x, y)
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build_getcc(getcc16, uint16_t, x, y)
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build_getcc(getcc32, uint32_t, x, y)
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build_getcc(getcc64, uint64_t, x, y)
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build_getcc(getcc8, uint8_t)
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build_getcc(getcc16, uint16_t)
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build_getcc(getcc32, uint32_t)
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build_getcc(getcc64, uint64_t)
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/**
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* @pre opsize = 1, 2, 4 or 8
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@ -31,7 +31,7 @@
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#define ATOMIC_H
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#include <cpu.h>
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#define build_atomic_load(name, size, type, ptr) \
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#define build_atomic_load(name, size, type) \
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static inline type name(const volatile type *ptr) \
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{ \
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type ret; \
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@ -41,10 +41,10 @@ static inline type name(const volatile type *ptr) \
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: "cc", "memory"); \
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return ret; \
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}
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build_atomic_load(atomic_load32, "l", uint32_t, p)
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build_atomic_load(atomic_load64, "q", uint64_t, p)
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build_atomic_load(atomic_load32, "l", uint32_t)
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build_atomic_load(atomic_load64, "q", uint64_t)
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#define build_atomic_store(name, size, type, ptr, v) \
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#define build_atomic_store(name, size, type) \
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static inline void name(volatile type *ptr, type v) \
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{ \
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asm volatile("mov" size " %1,%0" \
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@ -52,30 +52,30 @@ static inline void name(volatile type *ptr, type v) \
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: "r" (v) \
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: "cc", "memory"); \
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}
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build_atomic_store(atomic_store16, "w", uint16_t, p, v)
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build_atomic_store(atomic_store32, "l", uint32_t, p, v)
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build_atomic_store(atomic_store64, "q", uint64_t, p, v)
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build_atomic_store(atomic_store16, "w", uint16_t)
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build_atomic_store(atomic_store32, "l", uint32_t)
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build_atomic_store(atomic_store64, "q", uint64_t)
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#define build_atomic_inc(name, size, type, ptr) \
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#define build_atomic_inc(name, size, type) \
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static inline void name(type *ptr) \
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{ \
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asm volatile(BUS_LOCK "inc" size " %0" \
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: "=m" (*ptr) \
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: "m" (*ptr)); \
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}
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build_atomic_inc(atomic_inc32, "l", uint32_t, p)
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build_atomic_inc(atomic_inc64, "q", uint64_t, p)
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build_atomic_inc(atomic_inc32, "l", uint32_t)
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build_atomic_inc(atomic_inc64, "q", uint64_t)
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#define build_atomic_dec(name, size, type, ptr) \
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#define build_atomic_dec(name, size, type) \
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static inline void name(type *ptr) \
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{ \
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asm volatile(BUS_LOCK "dec" size " %0" \
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: "=m" (*ptr) \
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: "m" (*ptr)); \
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}
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build_atomic_dec(atomic_dec16, "w", uint16_t, p)
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build_atomic_dec(atomic_dec32, "l", uint32_t, p)
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build_atomic_dec(atomic_dec64, "q", uint64_t, p)
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build_atomic_dec(atomic_dec16, "w", uint16_t)
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build_atomic_dec(atomic_dec32, "l", uint32_t)
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build_atomic_dec(atomic_dec64, "q", uint64_t)
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/**
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* #define atomic_set32(P, V) (*(unsigned int *)(P) |= (V))
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@ -112,9 +112,9 @@ static inline void atomic_clear32(uint32_t *p, uint32_t v)
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* #define atomic_set64(P, V) (*(uint64_t *)(P) |= (V))
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*
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* Parameters:
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* uint32_t* p A pointer to memory area that stores source
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* uint64_t* p A pointer to memory area that stores source
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* value and setting result;
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* uint32_t v The value needs to be set.
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* uint64_t v The value needs to be set.
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*/
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static inline void atomic_set64(uint64_t *p, uint64_t v)
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{
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@ -128,9 +128,9 @@ static inline void atomic_set64(uint64_t *p, uint64_t v)
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* #define atomic_clear64(P, V) (*(uint64_t *)(P) &= ~(V))
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*
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* Parameters:
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* uint32_t* p A pointer to memory area that stores source
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* uint64_t* p A pointer to memory area that stores source
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* value and clearing result;
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* uint32_t v The value needs to be cleared.
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* uint64_t v The value needs to be cleared.
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*/
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static inline void atomic_clear64(uint64_t *p, uint64_t v)
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{
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@ -140,7 +140,7 @@ static inline void atomic_clear64(uint64_t *p, uint64_t v)
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: "cc", "memory");
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}
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#define build_atomic_swap(name, size, type, ptr, v) \
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#define build_atomic_swap(name, size, type) \
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static inline type name(type *ptr, type v) \
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{ \
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asm volatile(BUS_LOCK "xchg" size " %1,%0" \
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@ -149,8 +149,8 @@ static inline type name(type *ptr, type v) \
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: "cc", "memory"); \
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return v; \
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}
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build_atomic_swap(atomic_swap32, "l", uint32_t, p, v)
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build_atomic_swap(atomic_swap64, "q", uint64_t, p, v)
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build_atomic_swap(atomic_swap32, "l", uint32_t)
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build_atomic_swap(atomic_swap64, "q", uint64_t)
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/*
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* #define atomic_readandclear32(P) \
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@ -170,9 +170,8 @@ static inline uint64_t atomic_readandclear64(uint64_t *p)
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return atomic_swap64(p, 0UL);
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}
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#define build_atomic_cmpxchg(name, size, type, ptr, old, new) \
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static inline type name(volatile type *ptr, \
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type old, type new) \
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#define build_atomic_cmpxchg(name, size, type) \
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static inline type name(volatile type *ptr, type old, type new) \
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{ \
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type ret; \
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asm volatile(BUS_LOCK "cmpxchg" size " %2,%1" \
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@ -181,10 +180,10 @@ static inline type name(volatile type *ptr, \
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: "memory"); \
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return ret; \
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}
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build_atomic_cmpxchg(atomic_cmpxchg32, "l", uint32_t, p, old, new)
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build_atomic_cmpxchg(atomic_cmpxchg64, "q", uint64_t, p, old, new)
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build_atomic_cmpxchg(atomic_cmpxchg32, "l", uint32_t)
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build_atomic_cmpxchg(atomic_cmpxchg64, "q", uint64_t)
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#define build_atomic_xadd(name, size, type, ptr, v) \
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#define build_atomic_xadd(name, size, type) \
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static inline type name(type *ptr, type v) \
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{ \
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asm volatile(BUS_LOCK "xadd" size " %0,%1" \
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@ -193,9 +192,9 @@ static inline type name(type *ptr, type v) \
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: "cc", "memory"); \
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return v; \
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}
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build_atomic_xadd(atomic_xadd16, "w", uint16_t, p, v)
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build_atomic_xadd(atomic_xadd32, "l", int32_t, p, v)
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build_atomic_xadd(atomic_xadd64, "q", int64_t, p, v)
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build_atomic_xadd(atomic_xadd16, "w", uint16_t)
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build_atomic_xadd(atomic_xadd32, "l", int32_t)
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build_atomic_xadd(atomic_xadd64, "q", int64_t)
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static inline int32_t atomic_add_return(int32_t *p, int32_t v)
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{
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@ -190,40 +190,40 @@ static inline uint16_t clz64(uint64_t value)
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* Note:Input parameter nr shall be less than 64.
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* If nr>=64, it will be truncated.
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*/
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#define build_bitmap_set(name, op_len, op_type, lock, nr, addr) \
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#define build_bitmap_set(name, op_len, op_type, lock) \
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static inline void name(uint16_t nr_arg, volatile op_type *addr) \
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{ \
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uint16_t nr; \
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nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \
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asm volatile(lock "or" op_len " %1,%0" \
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: "+m" (*addr) \
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: "r" ((op_type)(1UL<<nr)) \
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: "cc", "memory"); \
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{ \
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uint16_t nr; \
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nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \
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asm volatile(lock "or" op_len " %1,%0" \
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: "+m" (*addr) \
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: "r" ((op_type)(1UL<<nr)) \
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: "cc", "memory"); \
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}
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build_bitmap_set(bitmap_set_nolock, "q", uint64_t, "", nr, addr)
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build_bitmap_set(bitmap_set_lock, "q", uint64_t, BUS_LOCK, nr, addr)
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build_bitmap_set(bitmap32_set_nolock, "l", uint32_t, "", nr, addr)
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build_bitmap_set(bitmap32_set_lock, "l", uint32_t, BUS_LOCK, nr, addr)
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build_bitmap_set(bitmap_set_nolock, "q", uint64_t, "")
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build_bitmap_set(bitmap_set_lock, "q", uint64_t, BUS_LOCK)
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build_bitmap_set(bitmap32_set_nolock, "l", uint32_t, "")
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build_bitmap_set(bitmap32_set_lock, "l", uint32_t, BUS_LOCK)
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/*
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* (*addr) &= ~(1UL<<nr);
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* Note:Input parameter nr shall be less than 64.
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* If nr>=64, it will be truncated.
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*/
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#define build_bitmap_clear(name, op_len, op_type, lock, nr, addr) \
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static inline void name(uint16_t nr_arg, volatile op_type *addr) \
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#define build_bitmap_clear(name, op_len, op_type, lock) \
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static inline void name(uint16_t nr_arg, volatile op_type *addr) \
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{ \
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uint16_t nr; \
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uint16_t nr; \
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nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \
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asm volatile(lock "and" op_len " %1,%0" \
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: "+m" (*addr) \
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: "r" ((op_type)(~(1UL<<(nr)))) \
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: "cc", "memory"); \
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}
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build_bitmap_clear(bitmap_clear_nolock, "q", uint64_t, "", nr, addr)
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build_bitmap_clear(bitmap_clear_lock, "q", uint64_t, BUS_LOCK, nr, addr)
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build_bitmap_clear(bitmap32_clear_nolock, "l", uint32_t, "", nr, addr)
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build_bitmap_clear(bitmap32_clear_lock, "l", uint32_t, BUS_LOCK, nr, addr)
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build_bitmap_clear(bitmap_clear_nolock, "q", uint64_t, "")
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build_bitmap_clear(bitmap_clear_lock, "q", uint64_t, BUS_LOCK)
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build_bitmap_clear(bitmap32_clear_nolock, "l", uint32_t, "")
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build_bitmap_clear(bitmap32_clear_lock, "l", uint32_t, BUS_LOCK)
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/*
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* return !!((*addr) & (1UL<<nr));
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@ -261,22 +261,22 @@ static inline bool bitmap32_test(uint16_t nr_arg, volatile uint32_t *addr)
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* Note:Input parameter nr shall be less than 64. If nr>=64, it
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* will be truncated.
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*/
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#define build_bitmap_testandset(name, op_len, op_type, lock, nr, addr) \
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static inline bool name(uint16_t nr_arg, volatile op_type *addr) \
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#define build_bitmap_testandset(name, op_len, op_type, lock) \
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static inline bool name(uint16_t nr_arg, volatile op_type *addr) \
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{ \
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uint16_t nr; \
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uint16_t nr; \
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int32_t ret=0; \
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nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \
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asm volatile(lock "bts" op_len " %2,%1\n\tsbbl %0,%0" \
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: "=r" (ret), "=m" (*addr) \
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: "r" ((op_type)nr) \
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: "cc", "memory"); \
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return (ret != 0); \
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return (ret != 0); \
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}
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build_bitmap_testandset(bitmap_test_and_set_nolock, "q", uint64_t, "", nr, addr)
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build_bitmap_testandset(bitmap_test_and_set_lock, "q", uint64_t, BUS_LOCK, nr, addr)
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build_bitmap_testandset(bitmap32_test_and_set_nolock, "l", uint32_t, "", nr, addr)
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build_bitmap_testandset(bitmap32_test_and_set_lock, "l", uint32_t, BUS_LOCK, nr, addr)
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build_bitmap_testandset(bitmap_test_and_set_nolock, "q", uint64_t, "")
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build_bitmap_testandset(bitmap_test_and_set_lock, "q", uint64_t, BUS_LOCK)
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build_bitmap_testandset(bitmap32_test_and_set_nolock, "l", uint32_t, "")
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build_bitmap_testandset(bitmap32_test_and_set_lock, "l", uint32_t, BUS_LOCK)
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/*
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* bool ret = (*addr) & (1UL<<nr);
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@ -285,24 +285,21 @@ build_bitmap_testandset(bitmap32_test_and_set_lock, "l", uint32_t, BUS_LOCK, nr,
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* Note:Input parameter nr shall be less than 64. If nr>=64,
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* it will be truncated.
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*/
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#define build_bitmap_testandclear(name, op_len, op_type, lock, nr, addr)\
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static inline bool name(uint16_t nr_arg, volatile op_type *addr) \
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#define build_bitmap_testandclear(name, op_len, op_type, lock) \
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static inline bool name(uint16_t nr_arg, volatile op_type *addr) \
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{ \
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uint16_t nr; \
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uint16_t nr; \
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int32_t ret=0; \
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nr = nr_arg & ((8U * sizeof(op_type)) - 1U); \
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asm volatile(lock "btr" op_len " %2,%1\n\tsbbl %0,%0" \
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: "=r" (ret), "=m" (*addr) \
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: "r" ((op_type)nr) \
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: "cc", "memory"); \
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return (ret != 0); \
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return (ret != 0); \
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}
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build_bitmap_testandclear(bitmap_test_and_clear_nolock, "q", uint64_t, "", nr, addr)
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build_bitmap_testandclear(bitmap_test_and_clear_lock, "q",
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uint64_t, BUS_LOCK, nr, addr)
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build_bitmap_testandclear(bitmap32_test_and_clear_nolock, "l",
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uint32_t, "", nr, addr)
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build_bitmap_testandclear(bitmap32_test_and_clear_lock, "l",
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uint32_t, BUS_LOCK, nr, addr)
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build_bitmap_testandclear(bitmap_test_and_clear_nolock, "q", uint64_t, "")
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build_bitmap_testandclear(bitmap_test_and_clear_lock, "q", uint64_t, BUS_LOCK)
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build_bitmap_testandclear(bitmap32_test_and_clear_nolock, "l", uint32_t, "")
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build_bitmap_testandclear(bitmap32_test_and_clear_lock, "l", uint32_t, BUS_LOCK)
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#endif /* BITS_H*/
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