acrn-hypervisor/hypervisor/arch/x86/guest
Zide Chen f4cce46605 hv: disable SMX (Safer Mode Extension) from guest CPUID
SMX should be disabled on guests.

Actually current code assumes SMX is disabled (no VM exit handler for GETSEC
and bit 2 of IA32_FEATURE_CONTROL is set), and this patch simply explicitly
clear guest CPUID.01H.ECX[6].

Since both CPUID.01H.ECX[5] and CPUID.01H.ECX[6] are cleared from guest CPUID,
MSR IA32_SMM_MONITOR_CTL is not available in guests.

Need to make sure CR4.SMXE is cleared in guests.

Tracked-On: #1867
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-01-04 16:05:50 +08:00
..
guest.c HV: remove multi-returns in few routine in guest.c 2019-01-03 15:58:10 +08:00
instr_emul.c hv: enable SMAP in hypervisor 2018-12-14 15:24:26 +08:00
instr_emul.h hv: use int32_t replace int 2018-12-12 13:08:10 +08:00
pm.c HV: fix pm code for multi-exits & unsigned const 2018-12-20 21:56:48 +08:00
ucode.c hv: refine coding style for ucode.c 2018-12-19 09:44:42 +08:00
vcpu.c hv: use asm_pause() to replace inline ASM to satisfy MISRAC 2018-12-27 12:35:40 +08:00
vcpuid.c hv: disable SMX (Safer Mode Extension) from guest CPUID 2019-01-04 16:05:50 +08:00
vlapic_priv.h hv: self-IPI APIC register in x2APIC mode of guest vLAPIC 2018-11-02 13:48:43 +08:00
vlapic.c HV: remove multi returns in vlapic_set_apicbase 2019-01-03 15:58:10 +08:00
vm.c HV: disable vuart when dbg uart is disabled 2019-01-02 12:15:53 +08:00
vmcall.c hv: vmcall: fix "goto detected" violations 2018-12-24 09:57:43 +08:00
vmsr.c hv: disable SMX (Safer Mode Extension) from guest CPUID 2019-01-04 16:05:50 +08:00
vmtrr.c hv: refine a few functions to only one exit point 2018-12-19 09:17:30 +08:00