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kata-ml-coordinator: Fix bit bug

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pc_start is a full 16 bits, freeze is 1 bit. Mixed up the bit ands. Need
auto-generation :)

Change-Id: Ib4f701b43e131bfcb448c68b06d2518cf80e8098
GitOrigin-RevId: a7c3c64eb15ffce8e76b28b105832a253a6d580b
This commit is contained in:
Adam Jesionowski 2021-08-06 10:52:49 -07:00 committed by Sam Leffler
parent b9cc80a929
commit 0a952a59f4
1 changed files with 1 additions and 1 deletions
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2
apps/system/components/MlCoordinator/kata-ml-coordinator/src/run.rs
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@ -23,7 +23,7 @@ pub extern "C" fn run() {
// TODO: Move out of this file into separate (auto-generated?) file.
// TODO: Consider the modular_bitfield crate to represent bitfields.
fn vctop_ctrl(freeze: u32, vc_reset: u32, pc_start: u32) -> u32 {
((pc_start & 1) << 2) + ((vc_reset & 1) << 1) + freeze
(pc_start << 2) + ((vc_reset & 1) << 1) + (freeze & 1)
}
#[no_mangle]