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Add VectorCoreDriver interrupt handlers

Browse Source 
Bug: 199798457
Change-Id: I2899022b9d6d57304d70c50b08e08d225d10c511
GitOrigin-RevId: 22a051696dac158c43df42ccd6a436e314f25f70
This commit is contained in:
Cindy Liu 2021-09-17 22:36:44 -07:00 committed by Sam Leffler
parent 47efe82e87
commit cd45ee8c01
3 changed files with 59 additions and 2 deletions
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8
apps/system/components/VectorCoreDriver/VectorCoreDriver.camkes
View File

@ -1,5 +1,9 @@
component VectorCoreDriver {
dataport Buf csr;
dataport Buf csr;
consumes Interrupt host_req;
consumes Interrupt finish;
consumes Interrupt instruction_fault;
consumes Interrupt data_fault;
provides VectorCoreInterface vctop;
provides VectorCoreInterface vctop;
}

36
apps/system/components/VectorCoreDriver/src/driver.c
View File

@ -8,6 +8,42 @@
#define VCTOP_REG(name) \
*((volatile uint32_t *)(CSR_OFFSET + VC_TOP_##name##_REG_OFFSET))
// CAmkES initialization hook.
//
// Enables Interrupts.
//
void pre_init() {
// Enables interrupts.
VCTOP_REG(INTR_ENABLE) = (BIT(VC_TOP_INTR_COMMON_HOST_REQ_BIT) |
BIT(VC_TOP_INTR_ENABLE_FINISH_BIT) |
BIT(VC_TOP_INTR_COMMON_INSTRUCTION_FAULT_BIT) |
BIT(VC_TOP_INTR_COMMON_DATA_FAULT_BIT));
}
void vctop_set_ctrl(uint32_t ctrl) {
VCTOP_REG(CTRL) = ctrl;
}
void host_req_handle(void) {
// Also need to clear the INTR_STATE (write-1-to-clear).
VCTOP_REG(INTR_STATE) = BIT(VC_TOP_INTR_STATE_HOST_REQ_BIT);
seL4_Assert(host_req_acknowledge() == 0);
}
void finish_handle(void) {
// Also need to clear the INTR_STATE (write-1-to-clear).
VCTOP_REG(INTR_STATE) = BIT(VC_TOP_INTR_STATE_FINISH_BIT);
seL4_Assert(finish_acknowledge() == 0);
}
void instruction_fault_handle(void) {
// Also need to clear the INTR_STATE (write-1-to-clear).
VCTOP_REG(INTR_STATE) = BIT(VC_TOP_INTR_STATE_INSTRUCTION_FAULT_BIT);
seL4_Assert(instruction_fault_acknowledge() == 0);
}
void data_fault_handle(void) {
// Also need to clear the INTR_STATE (write-1-to-clear).
VCTOP_REG(INTR_STATE) = BIT(VC_TOP_INTR_STATE_DATA_FAULT_BIT);
seL4_Assert(data_fault_acknowledge() == 0);
}

17
apps/system/system.camkes
View File

@ -36,6 +36,11 @@ component OpenTitanUART {
component VectorCoreHw {
hardware;
dataport Buf csr;
emits Interrupt host_req;
emits Interrupt finish;
emits Interrupt instruction_fault;
emits Interrupt data_fault;
}
assembly {
@ -68,6 +73,14 @@ assembly {
connection seL4HardwareMMIO vc_csr(from vc_drv.csr, to vctop.csr);
connection seL4RPCCall ml_coord_to_driver(from ml_coordinator.vctop,
to vc_drv.vctop);
connection seL4HardwareInterrupt vctop_host_req(from vctop.host_req,
to vc_drv.host_req);
connection seL4HardwareInterrupt vctop_finish(from vctop.finish,
to vc_drv.finish);
connection seL4HardwareInterrupt vctop_instruction_fault(from vctop.instruction_fault,
to vc_drv.instruction_fault);
connection seL4HardwareInterrupt vctop_data_fault(from vctop.data_fault,
to vc_drv.data_fault);
// Hookup ProcessManager to DebugConsole for shell commands.
connection seL4RPCCall shell_process(from debug_console.proc_ctrl,
@ -129,6 +142,10 @@ assembly {
vctop.csr_paddr = 0x48000000;
vctop.csr_size = 0x1000;
vctop.host_req_irq_number = 34;
vctop.finish_irq_number = 35;
vctop.instruction_fault_irq_number = 36;
vctop.data_fault_irq_number = 37;
random.ID = 1;