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hv: remove unnecessary cancel_event_injection related stuff
cancel_event_injection is not need any more if we do 'scheudle' prior to acrn_handle_pending_request. Commit "921288a6672: hv: fix interrupt lost when do acrn_handle_pending_request twice" bring 'schedule' forward, so remove cancel_event_injection related stuff. Tracked-On: #3374 Signed-off-by: Shuo A Liu <shuo.a.liu@intel.com> Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
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ea849177a5
commit
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@ -579,7 +579,6 @@ void reset_vcpu(struct acrn_vcpu *vcpu)
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vcpu->arch.exception_info.exception = VECTOR_INVALID;
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vcpu->arch.cur_context = NORMAL_WORLD;
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vcpu->arch.irq_window_enabled = false;
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vcpu->arch.inject_event_pending = false;
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(void)memset((void *)vcpu->arch.vmcs, 0U, PAGE_SIZE);
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for (i = 0; i < NR_WORLD; i++) {
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@ -646,9 +645,6 @@ static void context_switch_out(struct sched_object *prev)
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{
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struct acrn_vcpu *vcpu = list_entry(prev, struct acrn_vcpu, sched_obj);
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/* cancel event(int, gp, nmi and exception) injection */
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cancel_event_injection(vcpu);
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atomic_store32(&vcpu->running, 0U);
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/* do prev vcpu context switch out */
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/* For now, we don't need to invalid ept.
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@ -365,8 +365,6 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu)
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bool injected = false;
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int32_t ret = 0;
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uint32_t tmp;
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uint32_t intr_info;
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uint32_t error_code;
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struct acrn_vcpu_arch *arch = &vcpu->arch;
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uint64_t *pending_req_bits = &arch->pending_req;
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@ -387,42 +385,28 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu)
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vcpu_set_vmcs_eoi_exit(vcpu);
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}
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/* handling cancelled event injection when vcpu is switched out */
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if (arch->inject_event_pending) {
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if ((arch->inject_info.intr_info & (EXCEPTION_ERROR_CODE_VALID << 8U)) != 0U) {
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error_code = arch->inject_info.error_code;
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exec_vmwrite32(VMX_ENTRY_EXCEPTION_ERROR_CODE, error_code);
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}
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intr_info = arch->inject_info.intr_info;
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exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD, intr_info);
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arch->inject_event_pending = false;
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injected = true;
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} else {
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/* SDM Vol 3 - table 6-2, inject high priority exception before
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* maskable hardware interrupt */
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injected = vcpu_inject_hi_exception(vcpu);
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if (!injected) {
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/* inject NMI before maskable hardware interrupt */
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if (bitmap_test_and_clear_lock(ACRN_REQUEST_NMI, pending_req_bits)) {
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/* Inject NMI vector = 2 */
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exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD,
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/* SDM Vol 3 - table 6-2, inject high priority exception before
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* maskable hardware interrupt */
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injected = vcpu_inject_hi_exception(vcpu);
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if (!injected) {
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/* inject NMI before maskable hardware interrupt */
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if (bitmap_test_and_clear_lock(ACRN_REQUEST_NMI, pending_req_bits)) {
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/* Inject NMI vector = 2 */
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exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD,
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VMX_INT_INFO_VALID | (VMX_INT_TYPE_NMI << 8U) | IDT_NMI);
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injected = true;
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} else {
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/* handling pending vector injection:
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* there are many reason inject failed, we need re-inject again
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* here should take care
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* - SW exception (not maskable by IF)
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* - external interrupt, if IF clear, will keep in IDT_VEC_INFO_FIELD
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* at next vm exit?
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*/
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if ((arch->idt_vectoring_info & VMX_INT_INFO_VALID) != 0U) {
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exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD, arch->idt_vectoring_info);
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arch->idt_vectoring_info = 0U;
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injected = true;
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} else {
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/* handling pending vector injection:
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* there are many reason inject failed, we need re-inject again
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* here should take care
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* - SW exception (not maskable by IF)
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* - external interrupt, if IF clear, will keep in IDT_VEC_INFO_FIELD
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* at next vm exit?
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*/
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if ((arch->idt_vectoring_info & VMX_INT_INFO_VALID) != 0U) {
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exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD, arch->idt_vectoring_info);
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arch->idt_vectoring_info = 0U;
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injected = true;
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}
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}
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}
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}
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@ -485,31 +469,6 @@ static inline bool acrn_inject_pending_intr(struct acrn_vcpu *vcpu,
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return ret;
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}
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void cancel_event_injection(struct acrn_vcpu *vcpu)
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{
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uint32_t intinfo;
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intinfo = exec_vmread32(VMX_ENTRY_INT_INFO_FIELD);
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/*
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* If event is injected, we clear VMX_ENTRY_INT_INFO_FIELD,
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* save injection info, and mark inject event pending.
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* The event will be re-injected in next acrn_handle_pending_request
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* call.
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*/
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if ((intinfo & VMX_INT_INFO_VALID) != 0U) {
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vcpu->arch.inject_event_pending = true;
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if ((intinfo & (EXCEPTION_ERROR_CODE_VALID << 8U)) != 0U) {
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vcpu->arch.inject_info.error_code =
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exec_vmread32(VMX_ENTRY_EXCEPTION_ERROR_CODE);
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}
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vcpu->arch.inject_info.intr_info = intinfo;
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exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD, 0U);
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}
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}
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/*
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* @pre vcpu != NULL
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*/
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@ -264,11 +264,6 @@ struct ext_context {
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#define EOI_EXIT_BITMAP_SIZE 256U
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struct event_injection_info {
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uint32_t intr_info;
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uint32_t error_code;
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};
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struct cpu_context {
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struct run_context run_ctx;
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struct ext_context ext_ctx;
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@ -339,8 +334,6 @@ struct acrn_vcpu_arch {
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/* interrupt injection information */
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uint64_t pending_req;
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bool inject_event_pending;
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struct event_injection_info inject_info;
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/* List of MSRS to be stored and loaded on VM exits or VM entries */
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struct msr_store_area msr_area;
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@ -210,8 +210,6 @@ int32_t interrupt_window_vmexit_handler(struct acrn_vcpu *vcpu);
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int32_t external_interrupt_vmexit_handler(struct acrn_vcpu *vcpu);
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int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu);
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void cancel_event_injection(struct acrn_vcpu *vcpu);
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extern uint64_t irq_alloc_bitmap[IRQ_ALLOC_BITMAP_SIZE];
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typedef void (*irq_action_t)(uint32_t irq, void *priv_data);
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