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hv: mmu: replace modify_mem with mmu_modify

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Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
This commit is contained in:
Li, Fei1 2018-07-16 16:44:29 +08:00 committed by lijinxia
parent 0a33c0deee
commit f7efd0fee5
2 changed files with 6 additions and 51 deletions
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55
hypervisor/arch/x86/mmu.c
View File

@ -35,7 +35,6 @@ static void *mmu_pml4_addr;
enum mem_map_request_type { enum mem_map_request_type {
PAGING_REQUEST_TYPE_MAP = 0, /* Creates a new mapping. */ PAGING_REQUEST_TYPE_MAP = 0, /* Creates a new mapping. */
PAGING_REQUEST_TYPE_UNMAP = 1, /* Removes a pre-existing entry */ PAGING_REQUEST_TYPE_UNMAP = 1, /* Removes a pre-existing entry */
PAGING_REQUEST_TYPE_MODIFY = 2,
/* Modifies a pre-existing entries attributes. */ /* Modifies a pre-existing entries attributes. */
PAGING_REQUEST_TYPE_UNKNOWN, PAGING_REQUEST_TYPE_UNKNOWN,
}; };
@ -366,25 +365,6 @@ static uint32_t map_mem_region(void *vaddr, void *paddr,
} }
break; break;
} }
case PAGING_REQUEST_TYPE_MODIFY:
{
/* Allow mapping or modification as requested. */
table_entry = ((table_type == PTT_EPT)
? attr : (attr | IA32E_COMM_P_BIT));
table_entry |= (uint64_t) paddr;
/* Write the table entry to map this memory */
mem_write64(table_base + table_offset, table_entry);
/* Modify, need to invalidate TLB and
* page-structure cache
*/
if (table_type == PTT_HOST) {
mmu_need_invtlb = true;
}
break;
}
default: default:
ASSERT(false, "Bad memory map request type"); ASSERT(false, "Bad memory map request type");
return 0; return 0;
@ -581,9 +561,6 @@ void init_paging(void)
struct e820_entry *entry; struct e820_entry *entry;
uint64_t hv_hpa; uint64_t hv_hpa;
uint32_t i; uint32_t i;
int attr_wb = (MMU_MEM_ATTR_BIT_READ_WRITE |
MMU_MEM_ATTR_BIT_USER_ACCESSIBLE |
MMU_MEM_ATTR_TYPE_CACHED_WB);
int attr_uc = (MMU_MEM_ATTR_BIT_READ_WRITE | int attr_uc = (MMU_MEM_ATTR_BIT_READ_WRITE |
MMU_MEM_ATTR_BIT_USER_ACCESSIBLE | MMU_MEM_ATTR_BIT_USER_ACCESSIBLE |
MMU_MEM_ATTR_TYPE_UNCACHED); MMU_MEM_ATTR_TYPE_UNCACHED);
@ -610,9 +587,10 @@ void init_paging(void)
for (i = 0U; i < e820_entries; i++) { for (i = 0U; i < e820_entries; i++) {
entry = &e820[i]; entry = &e820[i];
if (entry->type == E820_TYPE_RAM) { if (entry->type == E820_TYPE_RAM) {
modify_mem(&map_params, (void *)entry->baseaddr, mmu_modify((uint64_t *)mmu_pml4_addr,
(void *)entry->baseaddr, entry->baseaddr, entry->length,
entry->length, attr_wb); PAGE_CACHE_WB, PAGE_CACHE_MASK,
PTT_HOST);
} }
} }
@ -620,10 +598,8 @@ void init_paging(void)
* to supervisor-mode for hypervisor owned memroy. * to supervisor-mode for hypervisor owned memroy.
*/ */
hv_hpa = get_hv_image_base(); hv_hpa = get_hv_image_base();
modify_mem(&map_params, (void *)hv_hpa, (void *)hv_hpa, mmu_modify((uint64_t *)mmu_pml4_addr, hv_hpa, CONFIG_RAM_SIZE,
CONFIG_RAM_SIZE, attr_wb & (~MMU_MEM_ATTR_BIT_USER_ACCESSIBLE)); PAGE_CACHE_WB, PAGE_CACHE_MASK | PAGE_USER, PTT_HOST);
pr_dbg("Enabling MMU ");
/* Enable paging */ /* Enable paging */
enable_paging(HVA2HPA(mmu_pml4_addr)); enable_paging(HVA2HPA(mmu_pml4_addr));
@ -1088,22 +1064,3 @@ int unmap_mem(struct map_params *map_params, void *paddr, void *vaddr,
} }
return ret; return ret;
} }
int modify_mem(struct map_params *map_params, void *paddr, void *vaddr,
uint64_t size, uint32_t flags)
{
int ret = 0;
/* used for MMU and EPT*/
ret = modify_paging(map_params, paddr, vaddr, size, flags,
PAGING_REQUEST_TYPE_MODIFY, true);
if (ret < 0) {
return ret;
}
/* only for EPT */
if (map_params->page_table_type == PTT_EPT) {
ret = modify_paging(map_params, vaddr, paddr, size, flags,
PAGING_REQUEST_TYPE_MODIFY, false);
}
return ret;
}

2
hypervisor/include/arch/x86/mmu.h
View File

@ -325,8 +325,6 @@ int map_mem(struct map_params *map_params, void *paddr, void *vaddr,
uint64_t size, uint32_t flags); uint64_t size, uint32_t flags);
int unmap_mem(struct map_params *map_params, void *paddr, void *vaddr, int unmap_mem(struct map_params *map_params, void *paddr, void *vaddr,
uint64_t size, uint32_t flags); uint64_t size, uint32_t flags);
int modify_mem(struct map_params *map_params, void *paddr, void *vaddr,
uint64_t size, uint32_t flags);
int mmu_modify(uint64_t *pml4_page, int mmu_modify(uint64_t *pml4_page,
uint64_t vaddr_base, uint64_t size, uint64_t vaddr_base, uint64_t size,
uint64_t prot_set, uint64_t prot_clr, uint64_t prot_set, uint64_t prot_clr,