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hv: vlapic: minor fix about APICv inject interrupt
When VID is enabeld, we should always inejct the pending interrupts when vm enter. Tracked-On: #1842 Signed-off-by: Li, Fei1 <fei1.li@intel.com>
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@ -468,25 +468,6 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu)
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arch->inject_event_pending = false;
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arch->inject_event_pending = false;
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} else {
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} else {
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/*
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* From SDM Vol3 26.3.2.5:
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* Once the virtual interrupt is recognized, it will be delivered
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* in VMX non-root operation immediately after VM entry(including
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* any specified event injection) completes.
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*
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* So the hardware can handle vmcs event injection and
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* evaluation/delivery of apicv virtual interrupts in one time
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* vm-entry.
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*
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* Here to sync the pending interrupts to irr and update rvi if
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* needed. And then try to handle vmcs event injection.
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*/
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if (is_apicv_advanced_feature_supported() &&
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bitmap_test_and_clear_lock(ACRN_REQUEST_EVENT, pending_req_bits)) {
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vlapic = vcpu_vlapic(vcpu);
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vlapic_apicv_inject_pir(vlapic);
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}
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/* SDM Vol 3 - table 6-2, inject high priority exception before
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/* SDM Vol 3 - table 6-2, inject high priority exception before
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* maskable hardware interrupt */
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* maskable hardware interrupt */
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if (vcpu_inject_hi_exception(vcpu) == 0) {
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if (vcpu_inject_hi_exception(vcpu) == 0) {
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@ -501,6 +482,25 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu)
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}
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}
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}
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}
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/*
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* From SDM Vol3 26.3.2.5:
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* Once the virtual interrupt is recognized, it will be delivered
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* in VMX non-root operation immediately after VM entry(including
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* any specified event injection) completes.
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*
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* So the hardware can handle vmcs event injection and
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* evaluation/delivery of apicv virtual interrupts in one time
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* vm-entry.
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*
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* Here to sync the pending interrupts to irr and update rvi if
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* needed. And then try to handle vmcs event injection.
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*/
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if (is_apicv_advanced_feature_supported() &&
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bitmap_test_and_clear_lock(ACRN_REQUEST_EVENT, pending_req_bits)) {
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vlapic = vcpu_vlapic(vcpu);
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vlapic_apicv_inject_pir(vlapic);
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}
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/*
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/*
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* If "virtual-interrupt delivered" is enabled, CPU will evaluate
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* If "virtual-interrupt delivered" is enabled, CPU will evaluate
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* and automatic inject the virtual interrupts in appropriate time.
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* and automatic inject the virtual interrupts in appropriate time.
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