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hv: vlapic: minor fix about APICv inject interrupt

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When VID is enabeld, we should always inejct the pending interrupts when vm enter.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
This commit is contained in:
Li, Fei1 2019-03-18 19:50:46 +08:00 committed by wenlingz
parent 846b5cf6b7
commit fde2c07c0a
1 changed files with 19 additions and 19 deletions
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28
hypervisor/arch/x86/guest/virq.c
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@ -468,6 +468,20 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu)
arch->inject_event_pending = false;
} else {
/* SDM Vol 3 - table 6-2, inject high priority exception before
* maskable hardware interrupt */
if (vcpu_inject_hi_exception(vcpu) == 0) {
/* inject NMI before maskable hardware interrupt */
if (bitmap_test_and_clear_lock(ACRN_REQUEST_NMI, pending_req_bits)) {
/* Inject NMI vector = 2 */
exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD,
VMX_INT_INFO_VALID | (VMX_INT_TYPE_NMI << 8U) | IDT_NMI);
} else {
ret = acrn_inject_pending_vector(vcpu, pending_req_bits);
}
}
}
/*
* From SDM Vol3 26.3.2.5:
* Once the virtual interrupt is recognized, it will be delivered
@ -487,20 +501,6 @@ int32_t acrn_handle_pending_request(struct acrn_vcpu *vcpu)
vlapic_apicv_inject_pir(vlapic);
}
/* SDM Vol 3 - table 6-2, inject high priority exception before
* maskable hardware interrupt */
if (vcpu_inject_hi_exception(vcpu) == 0) {
/* inject NMI before maskable hardware interrupt */
if (bitmap_test_and_clear_lock(ACRN_REQUEST_NMI, pending_req_bits)) {
/* Inject NMI vector = 2 */
exec_vmwrite32(VMX_ENTRY_INT_INFO_FIELD,
VMX_INT_INFO_VALID | (VMX_INT_TYPE_NMI << 8U) | IDT_NMI);
} else {
ret = acrn_inject_pending_vector(vcpu, pending_req_bits);
}
}
}
/*
* If "virtual-interrupt delivered" is enabled, CPU will evaluate
* and automatic inject the virtual interrupts in appropriate time.