Commit Graph

13 Commits

Author SHA1 Message Date
Victor Sun
86e37fbe01 HV: add config code for cfl-k700-i7 board
Add configurations code of industry scenario and hybrid_rt scenario for
cfl-k700-i7 board to support build acrn binary from source code directly.

Tracked-On: #5212

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-10-14 11:25:09 +08:00
dongshen
e8b25bbbdb acrn-config: update missing or outdated configuration source code
so that vm_configurations.h/vm_configurations.c are consistent for
same scenario

Upload configuration source code for:
Board               scenarios
whl-ipc-i5          industry, hybrid, hybrid_rt, logical_partiton
whl-ipc-i7          industry, hybrid, hybrid_rt, logical_partiton
ehl-crb-b           industry, hybrid, hybrid_rt, logical_partition
nuc7i7dnb           industry, hybrid, logical_partition

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-09-16 10:37:09 +08:00
Shixiong Zhang
f180397186 acrn-config: add MACROs for mmcfg bus number
add 2 MACROs: DEFAULT_PCI_MMCFG_START_BUS and DEFAULT_PCI_MMCFG_END_BUS
in platform_acpi_info.h.

Tracked-On: #5233

Signed-off-by: Shixiong Zhang <shixiongx.zhang@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-09-09 09:31:56 +08:00
Wei Liu
52bb9d6983 acrn-config: add .clos to vm_configurations.c
1.Create board files for ehl-crb-b
2.Add .clos to vm_configurations.c

Tracked-On: #5229
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-08-28 16:44:06 +08:00
Wei Liu
29ac258134 acrn-config: code refactoring for CAT/MBA
1.Modify clos_mask and mba_delay as a member of the union type.
2.Move HV_SUPPORTED_MAX_CLOS ,MAX_CACHE_CLOS_NUM_ENTRIES and
MAX_MBA_CLOS_NUM_ENTRIES to misc_cfg.h file.

Tracked-On: #5229
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-08-28 16:44:06 +08:00
dongshen
a425730f64 acrn-config: rename MAX_PLATFORM_CLOS_NUM to HV_SUPPORTED_MAX_CLOS
HV_SUPPORTED_MAX_CLOS:
 This value represents the maximum CLOS that is allowed by ACRN hypervisor.
 This value is set to be least common Max CLOS (CPUID.(EAX=0x10,ECX=ResID):EDX[15:0])
 among all supported RDT resources in the platform. In other words, it is
 min(maximum CLOS of L2, L3 and MBA). This is done in order to have consistent
 CLOS allocations between all the RDT resources.

Tracked-On: #5229
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
2020-08-28 16:44:06 +08:00
Shuang Zheng
c26ae8c420 hv: Inter-VM communication config for hybrid_rt on whl-ipc-i5
add an IVSHMEM regoin and the related configuration parameters in
hybrid_rt scenario on whl-ipc-i5. The size of the shared memory is
2M, and it is used for the communication between VM0 and VM2.

v6: rename shm name; remove unnecessary MACROs.

v7: rename MACRO for shm name; add unassigned vbdf for post-launched
    VMs.

Tracked-On: #4853

Signed-off-by: Shuang Zheng <shuang.zheng@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-08-19 15:06:15 +08:00
Wei Liu
088cd62d8b HV: sync hv reference code that generated by config tool
Sync hv reference code that generated by acrn-config tool.

Tracked-On: #5092
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
2020-08-17 14:34:30 +08:00
Wei Liu
a7e4a61fd1 HV: add hybrid_rt source code for whl-ipc-i5/i7
Add hybrid_rt source code for whl-ipc-i5/i7.

Tracked-On: #5081
Signed-off-by: Wei Liu <weix.w.liu@intel.com>
Acked-by: Victor Sun <victor.sun@intel.com>
2020-07-28 10:46:27 +08:00
Victor Sun
38caecae56 HV: add whl-ipc-i7 configurations code in misc/vm_configs
Add whl-ipc-i7 configurations code in misc/vm_configs/ folder with new layout;

Tracked-On: #5077

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-07-24 16:16:06 +08:00
Victor Sun
b071cd6a67 HV: add whl-ipc-i5 configurations code in misc/vm_configs
Add whl-ipc-i5 configurations code in misc/vm_configs/ folder with new layout;

Tracked-On: #5077

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-07-24 16:16:06 +08:00
Victor Sun
c5bd227f5b HV: add formated nuc7i7dnb configurations code in misc/vm_configs
Add acrn-config tool formated nuc7i7dnb configurations code in misc/vm_configs/
folder with new layout;

Tracked-On: #5077

Signed-off-by: Victor Sun <victor.sun@intel.com>
2020-07-24 16:16:06 +08:00
Victor Sun
e792fa3d3c HV: nuc7i7dnb example of new VM configuratons layout
There are 3 kinds of configurations in ACRN hypervisor source code: hypervisor
overall setting, per-board setting and scenario specific per-VM setting.
Currently Kconfig act as hypervisor overall setting and its souce is located at
"hypervisor/arch/x86/configs/$(BOARD).config"; Per-board configs are located at
"hypervisor/arch/x86/configs/$(BOARD)" folder; scenario specific per-VM configs
are located at "hypervisor/scenarios/$(SCENARIO)" folder.

This layout brings issues that board configs and VM configs are coupled tightly.
The board specific Kconfig file and misc_cfg.h are shared by all scenarios, and
scenario specific pci_dev.c is shared by all boards. So the user have no way to
build hypervisor binary for different scenario on different board with one
source code repo.

The patch will setup a new VM configurations layout as below:

  misc/vm_configs
  ├── boards                         --> folder of supported boards
  │   ├── <board_1>                  --> scenario-irrelevant board configs
  │   │   ├── board.c                --> C file of board configs
  │   │   ├── board_info.h           --> H file of board info
  │   │   ├── pci_devices.h          --> pBDF of PCI devices
  │   │   └── platform_acpi_info.h   --> native ACPI info
  │   ├── <board_2>
  │   ├── <board_3>
  │   └── <board...>
  └── scenarios                      --> folder of supported scenarios
      ├── <scenario_1>               --> scenario specific VM configs
      │   ├── <board_1>              --> board specific VM configs for <scenario_1>
      │   │   ├── <board_1>.config   --> Kconfig for specific scenario on specific board
      │   │   ├── misc_cfg.h         --> H file of board specific VM configs
      │   │   ├── pci_dev.c          --> board specific VM pci devices list
      │   │   └── vbar_base.h        --> vBAR base info of VM PT pci devices
      │   ├── <board_2>
      │   ├── <board_3>
      │   ├── <board...>
      │   ├── vm_configurations.c    --> C file of scenario specific VM configs
      │   └── vm_configurations.h    --> H file of scenario specific VM configs
      ├── <scenario_2>
      ├── <scenario_3>
      └── <scenario...>

The new layout would decouple board configs and VM configs completely:

The boards folder stores kinds of supported boards info, each board folder
stores scenario-irrelevant board configs only, which could be totally got from
a physical platform and works for all scenarios;

The scenarios folder stores VM configs of kinds of working scenario. In each
scenario folder, besides the generic scenario specific VM configs, the board
specific VM configs would be put in a embedded board folder.

In new layout, all configs files will be removed out of hypervisor folder and
moved to a separate folder. This would make hypervisor LoC calculation more
precisely with below fomula:
	typical LoC = Loc(hypervisor) + Loc(one vm_configs)
which
	Loc(one vm_configs) = Loc(misc/vm_configs/boards/<board>)
		+ LoC(misc/vm_configs/scenarios/<scenario>/<board>)
		+ Loc(misc/vm_configs/scenarios/<scenario>/vm_configurations.c
		+ Loc(misc/vm_configs/scenarios/<scenario>/vm_configurations.h

Tracked-On: #5077

Signed-off-by: Victor Sun <victor.sun@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2020-07-24 16:16:06 +08:00