Manually specifying MAX_IOAPIC_NUM and MAX_IOAPIC_LINES in a scenario XML
is still usable as a workaround on boards without IOAPIC (e.g. emulated
ones) or when the board inspector does not collect IOAPIC information
correctly.
This patch takes user-specified values of those items if
provided. Otherwise the automatically calculated values will be used
instead, as is done today.
Tracked-On: #6986
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Today the config.h/config.mk generators do not put a newline after an entry
without a value, which causes the generated files ill-formed.
This patch fixes the issue by putting a newline at the end of an entry
unconditionally.
Tracked-On: #6355
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
In XSL a string variable can be nul, the empty string or a non-empty
string. While `$var != ''` ensures that `var` is a non-empty string,
`$var = ''` is true only when `var` holds the empty string. In other words,
`$var = ''` and `$var != ''` can be both false if `var` evaluates to nul.
As a result, the config.h/config.mk generating scripts does not use the
given default value if the explicit value is nul.
This patch fixes the incorrect comparison in the XSL scripts that handles
default values, so that the default value behaves as expected.
Tracked-On: #6355
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
The board configuration generator assumes all PCI BARs are programmed when
the board inspector runs, which is sometimes not the case. Unprogrammed
BARs will be reported using plain texts wrapped by angle brackets in the
output of `lspci`.
This patch gracefully skips the unprogrammed BARs and continues when
parsing the output of `lspci`, in order to avoid build-time failures due to
unprogrammed BARs.
Tracked-On: #6355
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
While the terms to refer to CPU topology levels are originally borrowed
from MSR listings in SDMs (i.e. thread, core, die and package), we now
align the topology information with the CPUID topology enumeration
leaf (which does not have a "package" level) in the
implementation. However, some hard-coded level types are not updated
accordingly, leading to strangely organized nodes in the generated board
XML.
This patch refines the CPU extractor of the board inspector by removing
such hard code. Also the XPATH counting the total number of threads is
refined to tolerate the variance of reported intermediate levels.
Tracked-On: #6689
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Update the usage of cpu affinity param in launch script generation logic,
use apic_id got from board XML file instead of pcpu id from scenario XML
file according to the refined usage '--cpu_affinity lapic_id'.
The generated script will look like this:
`--cpu_affinity 0,2 \`
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
qemu build fail with the old board xml.
this should be re-generated by the latest board inspector tool
which include the changes in PR#7067
Tracked-On: #7058
Signed-off-by: zhongzhenx.liu <zhongzhenx.liu@intel.com>
The interrupt pin descriptors in board XML follows the same notation as in
ACPI PRT (PCI Routing Table), i.e. either an integer or a pair of a device
object and an index.
However, the current static INTx allocator recognizes
integer-as-interrupt-line only, which will cause build-time failure if
the "device object + index" notation is used in physical DSDT to describe
PCI interrupt pin routing.
This patch refines the static allocator so that both notations can be
parsed properly. In case an interrupt line descriptor in the board XML
refers to an device object without an index, it is interpreted as the first
of the ACPI device object if it is an interrupt resource.
Tracked-On: #7058
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
INTx routing can be specified in ACPI PRT (PCI Routing Table) in two ways:
1. By an absolute interrupt line from the global interrupt pool.
2. By a device object and an index to its interrupt resource.
The board inspector today only encodes the source object of an interrupt
pin routing in XML device resource descriptors, which is incomplete if the
source is a device object (i.e. case 2 above).
This patch adds the index from PRT to device resource nodes as well.
Tracked-On: #7058
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Add the shebang header (for Python) and make the acrn_configurator.py
executable so it can more easily be run as in './acrn_configurator.py'
Tracked-On: #7057
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
Today the XML validation logic is embedded in scenario_cfg_gen.py which is
highly entangled with the Python-internal representation of
configurations. Such representation is used by the current configurator,
but will soon be obsolete when the new configurator is introduced.
In order to avoid unnecessary work on this internal representation when we
refine the schema of scenario XML files, this patch separates the
validation logic into a new script which can either be used from the
command line or imported in other Python-based applications. At build time
this script will be used instead to validate the XML files given by users.
This change makes it easier to refine the current configuration items for
better developer experience.
Migration of existing checks in scenario_cfg_gen.py to XML schema will be
done by a following series.
v2 -> v3:
* Keep Invoking asl_gen.py to generate vACPI tables for pre-launched VMs.
v1 -> v2:
* Remove "all rights reserved" from the license header
* Upgrade the severity of the message indicating lack of xmlschema as
error according to our latest definitions of log severities, as
validation violations could indicate build time or boot time failures.
Tracked-On: #6690
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
1. for the `virtio-net`, add type field to specify tap/macvtap type.
The generated script will look like this. (eg. -s 4,virtio-net,tap=Waag)
2. Change mac_seed as virtio-net subparameter.
(eg. -s 10,virtio-net,tap=YaaG3,mac_seed=XXXXXX)
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Today we assume a device node under /sys/devices/pciXXXX:XX/ always contain
a `config` file which shows the configuration space of the PCI
functions. This seems not the case for, at least, Non-Transparent
Bridge (or NTB).
This patch checks the existence of the `config` file and skips PCI
functions which do not contain one.
Tracked-On: #6902
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
The stream tracks the AML binary to be parsed as a list of bytes, not
characters. It makes no sense to call `ord` with a byte as the input
parameter.
This patch also adjust the format of the dump and print the formatted using
the logging module.
Tracked-On: #6504
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Reviewed-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
1. remove the board_private tag in the schema and all existing scenario XML files,
and remove the related value check about board_private.rootfs and bootargs.
2. merge board_private.rootfs and board_private.bootargs to os_config.bootargs.
and no change to the related contents of the .c/.h files except the order of
define SERVICE_VM_ROOTFS.
3. update the schema to make os_config.bootargs configurable for service VM in UI.
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Since PR #7002 has removed "pm_notify_channel" and "pm_by_vuart"
from acrn-dm usage, this patch also removes the two parameters
in the launch script generation logic.
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Since PR #7002 has removed some dynamic parameters from
acrn-dm usage, this patch also removes the following parameters
in launch script generation logic.
1. --vsbl <vsbl_file_path>
2. -s <slot>,npk
3. -i, --ioc_node <ioc_mediator_parameters>
4. -A, --acpi
5. virtio-ipu
6. virtio-audio
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
If the user installed the lib python package in the host machine,
it will fail to build acrn hypervisor since the same package named lib is
also used in acrn config tool(static_allocators/lib).
So we add the __init__.py file under the static_allocators/lib directory
to fix the error.
Tracked-On: #7001
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Add a new extractor 40-acpi-tables.py which extracts ioapics basic
information such as: ioapic id, address, gsi base and gsi number.
An example:
<ioapics>
<ioapic id="0x2">
<address>0xfec00000</address>
<gsi_base>0x0</gsi_base>
<gsi_number>240</gsi_number>
</ioapic>
</ioapics>
Tracked-On: #6986
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
Reviewed-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
1.Re-obtain generic/nuc11/whl/cfl board xmls according to 6987.patch.
2.Modify the corresponding scenario pci.
3.Add cfl-k700-i7 scenario (hybrid/partitioned) and launch xml files.
Tracked-On: #6986
Signed-off-by: zhongzhenx.liu <zhongzhenx.liu@intel.com>
According to PCIe specification (since 2.0), absence of any extended
capabilities is required to be indicated by an extended capability header
with a capability ID of FFFFh and a next capability offset of 000h. Thus,
the board inspector today accesses the first extended capability header at
100h in the configuration space of a PCIe function unconditionally.
However, in practice we have seen real PCI functions which has a PCIe
capability but no extended capability header. This will cause the board
inspector to crash due to invalid configuration space accesses.
To fix that, this patch adds a check to the size of the configuration space
before walking the extended capabilities of a PCIe function.
Tracked-On: #6411
Signed-off-by: Junjie Mao <junjie.mao@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Extract the max pci bus number from board information and generate the
common configuration macro ACFG_MAX_PCI_BUS_NUM automatically.
Tracked-On: #6942
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
This patch adds an option CONFIG_KEEP_IRQ_DISABLED to hv (default n) and
config-tool so that when this option is 'y', all interrupts in hv root
mode will be permanently disabled.
With this option to be 'y', all interrupts received in root mode will be
handled in external interrupt vmexit after next VM entry. The postpone
latency is negligible. This new configuration is a requirement from x86
TEE's secure/non-secure interrupt flow support. Many race conditions can be
avoided when keeping IRQ off.
v5:
Rename CONFIG_ACRN_KEEP_IRQ_DISABLED to CONFIG_KEEP_IRQ_DISABLED
v4:
Change CPU_IRQ_ENABLE/DISABLE to
CPU_IRQ_ENABLE_ON_CONFIG/DISABLE_ON_CONFIG and guard them using
CONFIG_ACRN_KEEP_IRQ_DISABLED
v3:
CONFIG_ACRN_DISABLE_INTERRUPT -> CONFIG_ACRN_KEEP_IRQ_DISABLED
Add more comment in commit message
Tracked-On: #6571
Signed-off-by: Yifan Liu <yifan1.liu@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
1. remove LOG_DESTINATION in the related python code, schema and
all existing scenario XML files.
2. for MEM_LOGLEVEL, NPK_LOGLEVEL and CONSOLE_LOGLEVEL,
update the loglevel range to [0, 5] from [0, 6].
Tracked-On: #6934
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
remove LOG_BUF_SIZE in the related python code, schema and
all existing scenario XML files.
Tracked-On: #6690
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
Because it is not configurable, config tool might not need to
define DM_OWNED_GUEST_FLAG_MASK. So we remove it in tool.
Tracked-On: #6366
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
GUEST_FLAG_SECURITY_VM only for pre-launch vm, should not be
programmed by device model, so we remove it in DM_OWNED_GUEST_FLAG_MASK.
Tracked-On: #6366
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Get the integrated GPU bdf by looking for device from board.xml and extract the
BDF from device address.
Tracked-On: #6855
Signed-off-by: Yang,Yu-chu <yu-chu.yang@intel.com>
remove CONFIG_MAX_IR_ENTRIES the related python code, schema and
all existing scenario XML files since PR #6809 have changed it.
Tracked-On: #6745
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
remove LOW_RAM_SIZE in the related python code, schema and
all existing scenario XMLs because PR #6791 have removed it.
Tracked-On: #6805
Signed-off-by: Kunhui-Li <kunhuix.li@intel.com>
Add two VM flags for x86_tee. GUEST_FLAG_TEE for TEE VM,
GUEST_FLAG_REE for normal rich VM.
Tracked-On: #6571
Signed-off-by: Jie Deng <jie.deng@intel.com>
Reviewed-by: Wang, Yu1 <yu1.wang@intel.com>
