Commit Graph

1029 Commits

Author SHA1 Message Date
Binbin Wu
a94b2a533e hv: ept: disable execute right on large pages
Issue description:
-----------------
Machine Check Error on Page Size Change
Instruction fetch may cause machine check error if page size
and memory type was changed without invalidation on some
processors[1][2]. Malicious guest kernel could trigger this issue.

This issue applies to both primary page table and extended page
tables (EPT), however the primary page table is controlled by
hypervisor only. This patch mitigates the situation in EPT.

Mitigation details:
------------------
Implement non-execute huge pages in EPT.
This patch series clears the execute permission (bit 2) in the
EPT entries for large pages. When EPT violation is triggered by
guest instruction fetch, hypervisor converts the large page to
smaller 4 KB pages and restore the execute permission, and then
re-execute the guest instruction.

The current patch turns on the mitigation by default.
The follow-up patches will conditionally turn on/off the feature
per processor model.

[1] Refer to erratum KBL002 in "7th Generation Intel Processor
Family and 8th Generation Intel Processor Family for U Quad Core
Platforms Specification Update"
https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/7th-gen-core-family-spec-update.pdf
[2] Refer to erratum SKL002 in "6th Generation Intel Processor
Family Specification Update"
https://www.intel.com/content/www/us/en/products/docs/processors/core/desktop-6th-gen-core-family-spec-update.html

Tracked-On: #4120
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-11-19 09:06:21 +08:00
Binbin Wu
2d55b49ea1 hv: ept: flush cache for modified ept entries
EPT tables are shared by MMU and IOMMU.
Some IOMMUs don't support page-walk coherency, the cpu cache of EPT entires
should be flushed to memory after modifications, so that the modifications
are visible to the IOMMUs.

This patch adds a new interface to flush the cache of modified EPT entires.
There are different implementations for EPT/PPT entries:
- For PPT, there is no need to flush the cpu cache after update.
- For EPT, need to call iommu_flush_cache to make the modifications visible
to IOMMUs.

Tracked-On: #4120
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-11-19 09:06:21 +08:00
Binbin Wu
a6944fe620 hv: vtd: export iommu_flush_cache
VT-d shares the EPT tables as the second level translation tables.
For the IOMMUs that don't support page-walk coherecy, cpu cache should
be flushed for the IOMMU EPT entries that are modified.

For the current implementation, EPT tables for translating from GPA to HPA
for EPT/IOMMU are not modified after VM is created, so cpu cache invlidation is
done once per VM before starting execution of VM.
However, this may be changed, runtime EPT modification is possible.

When cpu cache of EPT entries is invalidated when modification, there is no need
invalidate cpu cache globally per VM.

This patch exports iommu_flush_cache for EPT entry cache invlidation operations.
- IOMMUs share the same copy of EPT table, cpu cache should be flushed if any of
  the IOMMU active doesn't support page-walk coherency.
- In the context of ACRN, GPA to HPA mapping relationship is not changed after
  VM created, skip flushing iotlb to avoid potential performance penalty.

Tracked-On: #4120
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Anthony Xu <anthony.xu@intel.com>
2019-11-19 09:06:21 +08:00
Sainath Grandhi
824caf8ce0 hv: Remove need for init_fallback_iommu_domain and fallback_iommu_domain
In the presence of SOS, ACRN uses fallback_iommu_domain which is the same
used by SOS, to assign domain to devices during ACRN init. Also it uses
fallback_iommu_domain when DM requests ACRN to remove device from UOS domain.
This patch changes the design of assign/remove_iommu_device to avoid the
concept of fallback_iommu_domain and its setup. This way ACRN can commonly
treat pre-launched VMs bringup w.r.t. IOMMU domain creation.

Tracked-On: #2965
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-04-17 11:42:36 +08:00
Yonghua Huang
46480f6e23 hv: add new hypercall to fetch platform configurations
add new hypercall get platform information,
 such as physical CPU number.

Tracked-On: #2538
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-15 22:14:13 +08:00
Sainath Grandhi
16a2af5715 hv: Build mptable for guest if VM type is Pre-Launched
ACRN builds mptable for pre-launched VMs. It uses CONFIG_PARTITION_MODE
to compile mptable source code and related support. This patch removes
the macro and checks if the type of VM is pre-launched to build mptable.

Tracked-On: #2941
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-15 15:51:02 +08:00
Shiqing Gao
869de39757 hv: rename 'assign_iommu_device' and 'unassign_iommu_device'
- rename 'assign_iommu_device' to 'assign_pt_device'
- rename 'unassign_iommu_device' to 'unassign_pt_device'

Tracked-On: #861
Signed-off-by: Shiqing Gao <shiqing.gao@intel.com>
Acked-by: Eddie Dong <eddie.dong@inte.com>
2019-04-15 15:38:01 +08:00
Victor Sun
445999af5d HV: make vm id statically by uuid
Currently VM id of NORMAL_VM is allocated dymatically, we need to make
VM id statically for FuSa compliance.

This patch will pre-configure UUID for all VMs, then NORMAL_VM could
get its VM id/configuration from vm_configs array by indexing the UUID.

If UUID collisions is found in vm configs array, HV will refuse to
load the VM;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-12 13:45:32 +08:00
Victor Sun
cb10dc7e73 HV: return bool in sanitize_vm_config
Return true if vm configs is sanitized successfully, otherwise return false;

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-12 13:45:32 +08:00
Victor Sun
6071234337 HV: use term of UUID
The code mixed the usage on term of UUID and GUID, now use UUID to make
code more consistent, also will use lowercase (i.e. uuid) in variable name
definition.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-12 13:45:32 +08:00
Li, Fei1
fa8fa37cdf hv: vlapic: remove vlapic_rdmsr/wrmsr
We could call vlapic API directly, remove vlapic_rdmsr/wrmsr to make things easier.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-04-12 10:11:10 +08:00
Mingqiang Chi
ad1bfd95ba hv: move pci.h to include/hw
renamed:    include/dm/pci.h -> include/hw/pci.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
2019-04-12 10:09:26 +08:00
Mingqiang Chi
69627ad7b6 hv: rename io_emul.c to vmx_io.c
renamed:  arch/x86/guest/io_emul.c -> arch/x86/guest/vmx_io.c
renamed:  include/arch/x86/guest/io_emul.h
	   -> include/arch/x86/guest/vmx_io.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-12 10:09:26 +08:00
Mingqiang Chi
17faa897a5 hv:move common/io_req.c/h to dm folder
renamed:    common/io_req.c -> dm/io_req.c
renamed:    include/arch/x86/io_req.h -> include/dm/io_req.h

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Reviewed-by: Yin Fengwei <fengwei.yin@intel.com>
2019-04-12 10:09:26 +08:00
Mingqiang Chi
2b79c6df6a hv:move some common APIs to io_req.c
Now the io_emul.c is relates with arch,io_req.c is common,
move some APIs from io_emul.c to io_req.c as common like these APIs:
register_pio/mmio_emulation_handler
dm_emulate_pio/mmio_complete
pio_default_read/write
mmio_default_access_handler
hv_emulate_pio/mmio etc

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-12 10:09:26 +08:00
Mingqiang Chi
0a1c016dbb hv: move 'emul_pio[]' from strcut vm_arch to acrn_vm
Move ‘emul_pio[]/default_io_read/default_io_write’
from struct vm_arch to struct acrn_vm

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-12 10:09:26 +08:00
Mingqiang Chi
35c8437bbc hv:move 'fire_vhm_interrupt' to io_emul.c
-- this api is related with arch_x86, then move to x86 folder
-- rename 'set_vhm_vector' to 'set_vhm_notification_vector'
-- rename 'acrn_vhm_vector' to 'acrn_vhm_notification_vector'
-- add an API 'get_vhm_notification_vector'

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
Reviewed-by: Jason Chen CJ <jason.cj.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-12 10:09:26 +08:00
Sainath Grandhi
5b70c202e1 hv: Remove CONFIG_PARTITION_MODE used to compile out irq enable/disable
ACRN uses CONFIG_PARTITION_MODE  macro to compile out CPU_IRQ_ENABLE/DISABLE
APIs. With vector remapping enabled for pre-launched VMs, this is of no use.
And for VMs with LAPIC pass-thru, interrupts stay disabled in vmexit loop
with the help of is_lapic_pt() API.

Tracked-On: #2903
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-08 13:10:44 +08:00
Victor Sun
16de23d0d5 HV: move CONFIG_MAX_VM_NUM to vm configurations
Now the MAX supported VM number is defined explicitly for each scenario,
so move this config from Kconfig to VM configuration.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-08 13:08:55 +08:00
Victor Sun
d3e4f69595 HV: use separated vm_config.c for each scenario
Previously we use unified vm_config.c for all scenarios and use MACROs
for each configuration items, then the initialization of vm_configs[]
becomes more complicated when definition of MACROs increase, so change
the coding style that all configurable items could be explicitly shown in
vm_configuration.c to make code more readable.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-08 13:08:55 +08:00
Geoffroy Van Cutsem
d8cec9f9c4 doc: fix '@return' and '@retval' statements for vCPU ops
Add, update '@return' and '@retval' statements to the API descriptions related
to vCPU operations.

Tracked-On: #1844
Signed-off-by: Geoffroy Van Cutsem <geoffroy.vancutsem@intel.com>
2019-04-08 11:07:16 +08:00
Sainath Grandhi
f22347346e hv: Remove separate interrupt routine for pre-launched VMs
As vector re-mapping is enabled for pre-launched/partition mode VMs,
there is no more need for separate interrupt routine i.e.
partition_mode_dispatch_interrupt.

Tracked-On: #2879
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-04-04 17:51:36 +08:00
Sainath Grandhi
5b795a3312 hv: add the support of vector remapping for pre-launched VMs
For pre-launched VMs MSI/MSI-x configuration writes are not intercepted by ACRN.
It is pass-thru and interrupts land in ACRN and the guest vector is injected into
the VM's vLAPIC. With this patch, ACRN intercepts MSI/MSI-x config writes and take
the code path to remap interrupt vector/APIC ID as it does for SOS/UOS.

Tracked-On: #2879
Signed-off-by: Sainath Grandhi <sainath.grandhi@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-04-04 17:51:36 +08:00
Kaige Fu
c4ec7ac358 DM: Keep consistency between HV and DM about PM1A_CNT_ADDR
To keep consistency between HV and DM about PM1A_CNT_ADDR,
it is better to replace the PM1A_CNT related MACROs used in DM
with VIRTUAL_PM1A_CNT related MACROs in acrn_common.h.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <Eddie.dong@intel.com>
2019-04-04 17:51:15 +08:00
Kaige Fu
336ed72250 HV: Minor refinement about RTVM pm MACRO and comments
This patch mainly does the following:
  - Replace prefix RT_VM_ with VIRTUAL_.
  - Remove the check of "addr != RT_VM_PM1A_CNT_ADDR" as the handler is specific for this addr.
  - Add comments about the meaning of return value.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-04 00:27:55 +08:00
Kaige Fu
9c5e16987a HV: Remove the check pcpu active status when sending INIT
Intel SDM Vol3 23.8 says:
  The INIT signal is blocked whenever a logical processor is in VMX root operation.
  It is not blocked in VMX nonroot operation. Instead, INITs cause VM exits

So, there is no side-effect to send INIT signal regardless of pcpu active status.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-04-04 00:27:55 +08:00
Yan, Like
ede1459e19 hv: fix the vm pointer check before use
After using get_vm_from_vmid(), vm pointer is always not NULL. But there are still many NULL pointer checks.
This commit replaced the NULL vm pointer check with a validation check which checks the vm status.
In addition, NULL check for pointer returned by get_sos_vm() and get_vm_config() is removed.

Tracked-On: #2520
Signed-off-by: Yan, Like <like.yan@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-02 16:29:51 +08:00
Victor Sun
56c193851a HV: introduce scenario Kconfig for sharing mode
Previously the vm_configs[] is defined separately for sharing mode and
partition mode, but the concept of hypervisor mode will be removed. Instead
we will introduce scenario Kconfig for hypervisor to load different vm
configurations.

SDC(Software Defined Cockpit) is a typical scenario that ACRN supported
so we introduce this scenario for previously sharing mode and move its
configurations to scenarios/sdc folder. The configuration could be used
for all boards reference.

Tracked-On: #2291

Signed-off-by: Victor Sun <victor.sun@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-02 16:00:27 +08:00
Jian Jun Chen
cee45a80d9 hv: add default handlers for PIO/MMIO access
Add the default handlers for PIO and MMIO access which returns all
FFs on read and discards write. These default handlers are registered
when SOS VM or pre-launched VM is created.

v3 -> v4:
- use single layer if in hv_emulate_pio
- change the implementation of pio_default_read

v2 -> v3:
- use runtime vm type instead of CONFIG_PARTITION_MODE
- revise the pio/mmio emulation functions
- revise the pio/mmio default read functions according to MISRA C
- revise the commit message

v1 -> v2:
- add default handlers members in struct acrn_vm and add interfaces
  to register default handlers for PIO and MMIO.

Tracked-On: #2860
Signed-off-by: Jian Jun Chen <jian.jun.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-04-01 11:16:37 +08:00
Kaige Fu
2771b46b1d HV: Add one delmode parameter to make_reschedule_request
This patch makes make_reschedule_request support for kicking
off vCPU using INIT.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
ef9be0208a HV: Introduce one new API send_single_init
This API is only for kick vcpu out of non-root mode when
RTVM poweroff by itself. And the first caller will soon come
along with the next patch.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
8ad5adced7 HV: Set vm state as with VM_POWERING_OFF when RTVM poweroff by itself
We set the vm state as VM_POWERING_OFF when RTVM is trying to poweroff by itself.
We will check it when trying to pause vCPUs of RTVM. Only if vm state equal to
VM_POWERING_OFF, we take action to pause the vCPUs of RTVM. Otherwise, we will
reject the pause request.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
83d11bbff8 HV: Register S5 pio handler for dm-launched RTVM
The virtual pm port of RTVM is intercepted by HV. But the HV needs to inform the DM as well.
So we will forward the virtual S5 request to DM too

The handler in HV just set the pm state flag (VM_POWERING_OFF) which indicate that the RTVM is powering
off by itself. Meanwhile, there are data resources in VHM and DM should be released once we handle the PM
of RTVM in HV. So, return to DM to go through the entire VM destroy cycles to release the resources.
During the cycles, the DM will try to pause vm through hypercall. In the hypercall handler in HV, we will
check the pm state flag. If it is set, pause all the vCPUs of the vm. Otherwise, reject the request.

In this way, we can make sure that RTVM can only trigger its s5 by itself. All
other S5 request from external will be rejected.

Here is sequence chart of RTVM s5.

   poweroff
+-----------+              +----------+           +-----------+         +----------+
|    vBSP   |              |    vAPs  |           |    HV     |         |    DM    |
+-----+-----+              +----------+           +-----+-----+         +-----+----+
      |                         |                       |                     |
      |   Stop all other cpus   |                       |                     |
      +----------------------------+                    |                     |
      |                         |  |Disable LAPIC       |                     |
      |                         +<-+                    |                     |
      |                         |                       |                     |
      |                         +--+                    |                     |
      |                         |  |HLT in              |                     |
      | All other cpus stopped  |  |non-root mode       |                     |
      +----------------------------+                    |                     |
      |     Call ACPI method to enter s5                |                     |
      +-------------------------+---------------------> |                     |
      |                         |   Set s5 flag         |                     |
      |                         | <---------------------+                     |
      |                         |   APs paused          | Re-inject IOREQ TO DM
      |                         | +-------------------> +-------------------> +
      |                         |                       |   Pause VM          |
      |                         |   Check S5 flag:      | <-------------------+
      |                         |    - If set, pause vm |  VM paused          |
      |                         |    - If no, reject    | +-----------------> +--+
      |                         |                       |  Destroy VM         |  |Deinit works
      |                         |                       | <--------------------<-+
      |                         |                       |  VM destroyed       |
      |                         |                       | +-----------------> |
      +                         +                       +                     +

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
1c0d7f78d0 HV: HV: make io_read_fn_t return true or false
This patch makes io_read_fn_t return true or false instead of void.
Returning true means that the handler in HV process the request completely.
Returning false means that we need to re-inject the request to DM after
processing it in HV.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
3b2ad67788 HV: make io_write_fn_t return true or false
This patch makes io_write_fn_t return true or false instead of void.
Returning true means that the handler in HV process the request completely.
Returning false means that we need to re-inject the request to DM after
processing it in HV.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
ed286e3239 HV: Introduce a new API is_rt_vm
This patch checks if the GUEST_FLAG_RT is set when GUEST_FLAG_LAPIC_PASSTHROUGH is set.
If GUEST_FLAG_RT is not set while GUEST_FLAG_LAPIC_PASSTHROUGH is set, we will refuse
to boot the VM.

Meanwhile, this patch introduces a new API is_rt_vm.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-29 16:17:44 +08:00
Kaige Fu
2e4d7eb527 DM: Add new flag GUEST_FLAG_RT for RTVM
This flag indicates that if the vm is RTVM.
And if a vm has GUEST_FLAG_LAPIC_PASSTHROUGH flag set,
we must set the GUEST_FLAG_RT at the same time.

Tracked-On: #2865
Signed-off-by: Kaige Fu <kaige.fu@intel.com>
2019-03-29 16:17:44 +08:00
Yonghua Huang
868778a68b hv: fix vulnerability when VM is destroyed
In hypervisor fuzzing test, hypervisor will hang
 if issuing HV_VM_SET_MEMORY_REGIONS hypercall after
 target VM is destroyed.

 this patch is to fix above vulnerability.

Tracked-On: #2849
Signed-off-by: Yonghua Huang <yonghua.huang@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-27 09:20:12 +08:00
yuhong.tao@intel.com
b1586ccc3e HV: move MAX_CONFIG_NAME_SIZE to acrn_common.h
The vm_config in hypervisor restricted VM name size to
MAX_CONFIG_NAME_SIZE (32 bytes). When UOS is launched by DM, the vmname
is passed in as the last optional args, we hope to to copy it to vm_config
in the future. So the size of vmname in DM args should be restricted to
MAX_CONFIG_NAME_SIZE, too. Because MAX_CONFIG_NAME_SIZE will be used by DM,
we move it from vm_config.h to acrn_common.h
We also rename MAX_CONFIG_NAME_SIZE to MAX_VM_OS_NAME_LEN, because it will
be used by another components, should has a clear name.

Tracked-On: #2851
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-26 21:23:16 +08:00
yuhong.tao@intel.com
c55308bd3d DM: use soft link of acrn_common.h in HV
devicemodel/include/public/acrn_common.h should be identical with
hypervisor/include/public/acrn_common.h, so we can use a soft link
to hypervisor's acrn_common.h for devicemodel.

Tracked-On: #2851
Signed-off-by: Tao Yuhong <yuhong.tao@intel.com>
2019-03-26 21:23:16 +08:00
wenlingz
3effbb05a2 Revert "hv: vmsr: add IA32_MISC_ENABLE to msr store area"
This reverts commit 98b3d98ac5.
2019-03-26 13:59:21 +08:00
Li, Fei1
40168e73ee hv: vlapic: remove TPR set/get API
Since we always enable "Use TPR shadow", so operate on TPR will not
trigger VM exit. So remove these APIs.

Tracked-On: #1842
Signed-off-by: Li, Fei1 <fei1.li@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-25 13:31:51 -07:00
dongshen
3be6c6593f HV: merge partition_mode.c and sharing_mode.c's code into vpci.c
Delete the 2 files and merge their code into vpci.c:
 hypervisor/dm/vpci/partition_mode.c
 hypervisor/dm/vpci/sharing_mode.c

And change the Makefile accordingly
Change PCI_PRIV_H_ to VPCI_PRIV_H_ in vpci_priv.h

Some misra c fix:
 Add @pre for functions
 Add const to function parameters

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-03-25 12:35:39 +08:00
dongshen
c6a60dd29c HV: remove all CONFIG_PARTITION_MODE from dm/vpci code
Instead of using CONFIG_PARTITION_MODE at compile time to compile in and call
the partition mode/sharing mode specific functions, always compile in all sharing
mode and partition code, then calling the corresponding functions dynamically based
on vm type (PRE_LAUNCHED_VM and SOS_VM) at runtime.

Some misra c fix:
 Add @pre for functions
 Add const to function parameters

Add ASSERT in pci_cfgdata_io_read and pci_cfgdata_io_write

Tracked-On: #2534
Signed-off-by: dongshen <dongsheng.x.zhang@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-25 12:35:39 +08:00
Arindam Roy
691468a361 HV: Remove hypervisor.h from bsp folder
Re-organize the code to remove usage of hypervisor.h from
bsp folder, without changing any functionality.

Tracked-On: #2694
Signed-off-by: Arindam Roy <arindam.roy@intel.com>
2019-03-25 11:13:57 +08:00
Binbin Wu
98b3d98ac5 hv: vmsr: add IA32_MISC_ENABLE to msr store area
Currently MSR IA32_MISC_ENABLE is passthrough to guest.
However, guest may change the value of this MSR, which will cause issue in hypervisor.
This patch uses VMX MSR store area to isolate the MSR IA32_MISC_ENABLE between guest and host.

TODO:
Some bits of the MSR IA32_MISC_ENABLE is not just per core, but per package.
So need to check if need to prevent guest from setting or clearing these bits that may affect other cores.

Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Acked-by: Anthony Xu <anthony.xu@intel.com>
2019-03-22 13:32:01 +08:00
Binbin Wu
273381b372 hv: vmsr: rename msr_num to msr_index in struct msr_store_entry
Rename the field msr_num to msr_index, which is more accurate,
in struct msr_store_entry.

Tracked-On: #2834
Signed-off-by: Binbin Wu <binbin.wu@intel.com>
Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2019-03-22 13:32:01 +08:00
Mingqiang Chi
5585084c00 hv:move 'udelay' to timer.c
-- move this api from misc.c to timer.c to avoid
   reverse dependency, and remove misc.c

Tracked-On: #1842
Signed-off-by: Mingqiang Chi <mingqiang.chi@intel.com>
2019-03-22 08:38:13 +08:00
Zide Chen
370998ba5a hv: replace MEM_2K with a new macro MAX_BOOTARGS_SIZE for bootargs size
- for all cases of referring guest bootargs size, replace MEM_2K with
  CONFIG_MAX_BOOTARGS_SIZE for better readability.
- remove duplicated MAX_BOOTARGS_SIZE definition from vm_config.h.

Also fix one minor issue in general_sw_loader() which uses copy_to_gpa()
to copy a string. Since copy_to_gpa() makes use of memncpy_s() to do the
job, the size parameter should include the string null ternimator.

Tracked-On: #2806
Signed-off-by: Zide Chen <zide.chen@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>
2019-03-21 13:08:15 +08:00
Qi Yadong
e381aef220 hv: seed: remove unused seed parsing source files
Remove the unused seed parsing source files under
hypervisor/boot/sbl and related header files.

Tracked-On: #2724
Signed-off-by: Qi Yadong <yadong.qi@intel.com>
2019-03-21 11:06:53 +08:00